Lines Matching defs:caching
969 * - `I915_MMAP_OFFSET_WC`: Use Write-Combined caching.
970 * - `I915_MMAP_OFFSET_WB`: Use Write-Back caching.
971 * - `I915_MMAP_OFFSET_FIXED`: Use object placement to determine caching.
974 * type. On devices without local memory, this caching mode is invalid.
976 * As caching mode when specifying `I915_MMAP_OFFSET_FIXED`, WC or WB will
1021 * Implicit caching rules, starting from DG1:
1581 * struct drm_i915_gem_caching - Set or get the caching for given object
1584 * Allow userspace to control the GTT caching bits for a given object when the
1587 * require unbinding the object from the GTT first, if its current caching value
1591 * set/get caching is no longer supported, and is now rejected. Instead the CPU
1592 * caching attributes(WB vs WC) will become an immutable creation time property
1593 * for the object, along with the GTT caching level. For now we don't expose any
1598 * Implicit caching rules, starting from DG1:
1612 * caching attributes for the pages might be required(and is expensive) if we
1613 * need to then CPU map the pages later with different caching attributes. This
1614 * inconsistent caching behaviour, while supported on x86, is not universally
1621 * @handle: Handle of the buffer to set/get the caching level.
1626 * @caching: The GTT caching level to apply or possible return value.
1628 * The supported @caching values:
1643 * Special GPU caching mode which is coherent with the scanout engines.
1654 __u32 caching;