Lines Matching refs:ibs_request
195 struct amdgpu_cs_request ibs_request;
218 memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
219 ibs_request.ip_type = AMDGPU_HW_IP_GFX;
220 ibs_request.ring = 0;
221 ibs_request.number_of_ibs = 1;
222 ibs_request.ibs = &ib_info;
223 ibs_request.resources = bo_list;
226 amdgpu_cs_submit(context, 0, &ibs_request, 1);
228 amdgpu_cs_sync(context, AMDGPU_HW_IP_GFX, 0, ibs_request.seq_no);
359 struct amdgpu_cs_request ibs_request;
390 memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
391 ibs_request.ip_type = AMDGPU_HW_IP_GFX;
392 ibs_request.ring = 0;
393 ibs_request.number_of_ibs = 1;
394 ibs_request.ibs = &ib_info;
395 ibs_request.resources = bo_list;
397 CU_ASSERT_EQUAL(amdgpu_cs_submit(context, 0, &ibs_request, 1), 0);
402 fence_status.fence = ibs_request.seq_no;