Lines Matching refs:req
207 struct amdgpu_bo_alloc_request req = {0};
214 req.alloc_size = 4*1024;
215 req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT;
217 r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
277 struct amdgpu_bo_alloc_request req = {0};
285 req.alloc_size = 4*1024; /* msg */
286 req.alloc_size += 4*1024; /* fb */
288 req.alloc_size += 4096; /*it_scaling_table*/
289 req.alloc_size += ALIGN(sizeof(uvd_bitstream), 4*1024);
290 req.alloc_size += ALIGN(dpb_size, 4*1024);
291 req.alloc_size += ALIGN(dt_size, 4*1024);
293 req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT;
295 r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
300 req.alloc_size, 1, 0, &va,
304 r = amdgpu_bo_va_op(buf_handle, 0, req.alloc_size, va, 0,
406 r = amdgpu_bo_va_op(buf_handle, 0, req.alloc_size, va, 0, AMDGPU_VA_OP_UNMAP);
418 struct amdgpu_bo_alloc_request req = {0};
425 req.alloc_size = 4*1024;
426 req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT;
428 r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
433 req.alloc_size, 1, 0, &va,
437 r = amdgpu_bo_va_op(buf_handle, 0, req.alloc_size, va, 0,
463 r = amdgpu_bo_va_op(buf_handle, 0, req.alloc_size, va, 0, AMDGPU_VA_OP_UNMAP);