Lines Matching refs:fence_status
854 struct amdgpu_cs_fence fence_status = {0};
911 fence_status.context = context_handle;
912 fence_status.ip_type = AMDGPU_HW_IP_GFX;
913 fence_status.ip_instance = 0;
914 fence_status.fence = ibs_request.seq_no;
916 r = amdgpu_cs_query_fence_status(&fence_status,
945 struct amdgpu_cs_fence fence_status = {0};
995 fence_status.context = context_handle;
996 fence_status.ip_type = AMDGPU_HW_IP_GFX;
997 fence_status.ip_instance = 0;
998 fence_status.fence = ibs_request.seq_no;
1000 r = amdgpu_cs_query_fence_status(&fence_status,
1204 struct amdgpu_cs_fence fence_status = {0};
1277 fence_status.context = context_handle[0];
1278 fence_status.ip_type = gc_ip_type;
1279 fence_status.ip_instance = 0;
1280 fence_status.fence = ibs_request[1].seq_no;
1281 r = amdgpu_cs_query_fence_status(&fence_status,
1318 fence_status.context = context_handle[1];
1319 fence_status.ip_type = gc_ip_type;
1320 fence_status.ip_instance = 0;
1321 fence_status.fence = ibs_request[1].seq_no;
1322 r = amdgpu_cs_query_fence_status(&fence_status,
1351 struct amdgpu_cs_fence fence_status;
1392 memset(&fence_status, 0, sizeof(struct amdgpu_cs_fence));
1396 fence_status.context = context_handle;
1397 fence_status.ip_type = AMDGPU_HW_IP_COMPUTE;
1398 fence_status.ip_instance = 0;
1399 fence_status.ring = instance;
1400 fence_status.fence = ibs_request.seq_no;
1402 r = amdgpu_cs_query_fence_status(&fence_status,
1467 struct amdgpu_cs_fence fence_status = {0};
1516 fence_status.ip_type = ip_type;
1517 fence_status.ip_instance = 0;
1518 fence_status.ring = ibs_request->ring;
1519 fence_status.context = context_handle;
1520 fence_status.fence = ibs_request->seq_no;
1523 r = amdgpu_cs_query_fence_status(&fence_status,
2066 struct amdgpu_cs_fence fence_status[2] = {0};
2127 fence_status[i].context = context_handle;
2128 fence_status[i].ip_type = AMDGPU_HW_IP_GFX;
2129 fence_status[i].fence = ibs_request[i].seq_no;
2132 r = amdgpu_cs_wait_fences(fence_status, ib_cs_num, wait_all,
2262 struct amdgpu_cs_fence fence_status;
2431 memset(&fence_status, 0, sizeof(struct amdgpu_cs_fence));
2432 fence_status.context = context_handle[0];
2433 fence_status.ip_type = AMDGPU_HW_IP_GFX;
2434 fence_status.ip_instance = 0;
2435 fence_status.ring = 0;
2436 fence_status.fence = ibs_request.seq_no;
2438 r = amdgpu_cs_query_fence_status(&fence_status,
2654 struct amdgpu_cs_fence fence_status = {0};
2749 fence_status.ip_type = ip_type;
2750 fence_status.ip_instance = 0;
2751 fence_status.ring = ring;
2752 fence_status.context = context_handle;
2753 fence_status.fence = ibs_request.seq_no;
2756 r = amdgpu_cs_query_fence_status(&fence_status,
2804 struct amdgpu_cs_fence fence_status = {0};
2906 fence_status.ip_type = ip_type;
2907 fence_status.ip_instance = 0;
2908 fence_status.ring = ring;
2909 fence_status.context = context_handle;
2910 fence_status.fence = ibs_request.seq_no;
2913 r = amdgpu_cs_query_fence_status(&fence_status,
3041 struct amdgpu_cs_fence fence_status = {0};
3145 fence_status.ip_type = ip_type;
3146 fence_status.ip_instance = 0;
3147 fence_status.ring = ring;
3148 fence_status.context = context_handle;
3149 fence_status.fence = ibs_request.seq_no;
3152 r = amdgpu_cs_query_fence_status(&fence_status,
3737 struct amdgpu_cs_fence fence_status = {0};
3804 fence_status.ip_type = AMDGPU_HW_IP_GFX;
3805 fence_status.ip_instance = 0;
3806 fence_status.ring = ring_id;
3807 fence_status.context = context_handle;
3808 fence_status.fence = ibs_request.seq_no;
3811 r = amdgpu_cs_query_fence_status(&fence_status,
3897 struct amdgpu_cs_fence fence_status = {0};
3988 fence_status.ip_type = AMDGPU_HW_IP_GFX;
3989 fence_status.ip_instance = 0;
3990 fence_status.ring = ring;
3991 fence_status.context = context_handle;
3992 fence_status.fence = ibs_request.seq_no;
3995 r = amdgpu_cs_query_fence_status(&fence_status,
4119 struct amdgpu_cs_fence fence_status = {0};
4232 fence_status.ip_type = AMDGPU_HW_IP_GFX;
4233 fence_status.ip_instance = 0;
4234 fence_status.ring = ring;
4235 fence_status.context = context_handle;
4236 fence_status.fence = ibs_request.seq_no;
4239 r = amdgpu_cs_query_fence_status(&fence_status,