Lines Matching defs:mc_address_dst
2645 uint64_t mc_address_dst, mc_address_shader, mc_address_cmd;
2680 &mc_address_dst, &va_dst);
2696 ptr_cmd[i++] = mc_address_dst;
2697 ptr_cmd[i++] = (mc_address_dst >> 32) | 0x100000;
2768 r = amdgpu_bo_unmap_and_free(bo_dst, va_dst, mc_address_dst, bo_dst_size);
2793 uint64_t mc_address_src, mc_address_dst, mc_address_shader, mc_address_cmd;
2836 &mc_address_dst, &va_dst);
2865 ptr_cmd[i++] = mc_address_dst;
2866 ptr_cmd[i++] = (mc_address_dst >> 32) | 0x100000;
2938 r = amdgpu_bo_unmap_and_free(bo_dst, va_dst, mc_address_dst, bo_dst_size);
3030 uint64_t mc_address_src, mc_address_dst, mc_address_shader, mc_address_cmd;
3075 &mc_address_dst, &va_dst);
3104 ptr_cmd[i++] = mc_address_dst;
3105 ptr_cmd[i++] = (mc_address_dst >> 32) | 0x100000;
3165 r = amdgpu_bo_unmap_and_free(bo_dst, va_dst, mc_address_dst, bo_dst_size);
3730 uint64_t mc_address_dst, mc_address_cmd;
3754 &mc_address_dst, &va_dst);
3760 i += amdgpu_draw_setup_and_write_drawblt_surf_info(ptr_cmd + i, mc_address_dst, version, 0);
3823 r = amdgpu_bo_unmap_and_free(bo_dst, va_dst, mc_address_dst, bo_dst_size);
3887 uint64_t mc_address_dst, mc_address_src, mc_address_cmd;
3918 &mc_address_dst, &va_dst);
3926 i += amdgpu_draw_setup_and_write_drawblt_surf_info(ptr_cmd + i, mc_address_dst, version, 0);
4019 r = amdgpu_bo_unmap_and_free(bo_dst, va_dst, mc_address_dst, bo_size);
4105 uint64_t mc_address_dst, mc_address_src, mc_address_cmd;
4163 &mc_address_dst, &va_dst);
4171 i += amdgpu_draw_setup_and_write_drawblt_surf_info(ptr_cmd + i, mc_address_dst, version, 1);
4250 r = amdgpu_bo_unmap_and_free(bo_dst, va_dst, mc_address_dst, bo_size);