Lines Matching defs:num_banks

103     uint32_t                        num_banks;
240 surf_man->hw_info.num_banks = 4;
243 surf_man->hw_info.num_banks = 8;
246 surf_man->hw_info.num_banks = 8;
371 xalign = (surf_man->hw_info.group_bytes * surf_man->hw_info.num_banks) /
373 xalign = MAX2(tilew * surf_man->hw_info.num_banks, xalign);
383 surf_man->hw_info.num_banks *
525 surf_man->hw_info.num_banks = 4;
528 surf_man->hw_info.num_banks = 8;
531 surf_man->hw_info.num_banks = 16;
534 surf_man->hw_info.num_banks = 8;
676 mtileh = (tileh * surf->bankh * surf_man->hw_info.num_banks) / surf->mtilea;
756 if (surf_man->hw_info.num_banks < surf->mtilea) {
921 surf->mtilea = surf_man->hw_info.num_banks;
1018 h_over_w = (((surf->bankh * surf_man->hw_info.num_banks) << 16) /
1074 unsigned *num_banks,
1103 if (num_banks) {
1107 *num_banks = 2;
1110 *num_banks = 4;
1113 *num_banks = 8;
1116 *num_banks = 16;
1241 surf_man->hw_info.num_banks = 4;
1244 surf_man->hw_info.num_banks = 8;
1247 surf_man->hw_info.num_banks = 16;
1250 surf_man->hw_info.num_banks = 8;
1621 unsigned num_pipes, unsigned num_banks,
1645 mtileh = (tileh * surf->bankh * num_banks) / surf->mtilea;
1705 unsigned num_pipes, num_banks;
1711 si_gb_tile_mode(gb_tile_mode, &num_pipes, &num_banks, NULL, NULL, NULL, NULL);
1713 r = si_surface_init_2d(surf_man, surf, surf->level, surf->bpe, tile_mode, num_pipes, num_banks, surf->tile_split, 0, 0);
1719 r = si_surface_init_2d(surf_man, surf, surf->stencil_level, 1, stencil_tile_mode, num_pipes, num_banks, surf->stencil_tile_split, surf->bo_size, 0);
1862 uint32_t *num_banks,
1958 if (num_banks) {
1962 *num_banks = 2;
1965 *num_banks = 4;
1968 *num_banks = 8;
1971 *num_banks = 16;
2071 surf_man->hw_info.num_banks = 4;
2074 surf_man->hw_info.num_banks = 8;
2077 surf_man->hw_info.num_banks = 16;
2080 surf_man->hw_info.num_banks = 8;
2219 unsigned num_pipes, unsigned num_banks,
2247 mtileh = (tileh * surf->bankh * num_banks) / surf->mtilea;
2308 uint32_t num_pipes, num_banks;
2312 &num_pipes, NULL, &num_banks, NULL, NULL, NULL);
2315 surf->tile_split, num_pipes, num_banks, 0, 0);
2322 surf->stencil_tile_split, num_pipes, num_banks,