Lines Matching defs:dev
45 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
51 drm_public int amdgpu_cs_ctx_create2(amdgpu_device_handle dev,
60 if (!dev || !context)
67 gpu_context->dev = dev;
78 r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_CTX, &args, sizeof(args));
97 drm_public int amdgpu_cs_ctx_create(amdgpu_device_handle dev,
100 return amdgpu_cs_ctx_create2(dev, AMDGPU_CTX_PRIORITY_NORMAL, context);
106 * \param dev - \c [in] amdgpu device handle
126 r = drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_CTX,
145 drm_public int amdgpu_cs_ctx_override_priority(amdgpu_device_handle dev,
153 if (!dev || !context || master_fd < 0)
159 args.in.fd = dev->fd;
185 r = drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_CTX,
204 r = drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_CTX,
225 r = drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_CTX,
234 * \param dev - \c [in] Device handle
249 amdgpu_device_handle dev = context->dev;
371 r = amdgpu_cs_submit_raw2(dev, context, bo_list_handle, num_chunks,
443 amdgpu_device_handle dev = context->dev;
459 r = drmIoctl(dev->fd, DRM_IOCTL_AMDGPU_WAIT_CS, &args);
506 amdgpu_device_handle dev = fences[0].context->dev;
526 r = drmIoctl(dev->fd, DRM_IOCTL_AMDGPU_WAIT_FENCES, &args);
660 drm_public int amdgpu_cs_create_syncobj2(amdgpu_device_handle dev,
664 if (NULL == dev)
667 return drmSyncobjCreate(dev->fd, flags, handle);
670 drm_public int amdgpu_cs_create_syncobj(amdgpu_device_handle dev,
673 if (NULL == dev)
676 return drmSyncobjCreate(dev->fd, 0, handle);
679 drm_public int amdgpu_cs_destroy_syncobj(amdgpu_device_handle dev,
682 if (NULL == dev)
685 return drmSyncobjDestroy(dev->fd, handle);
688 drm_public int amdgpu_cs_syncobj_reset(amdgpu_device_handle dev,
692 if (NULL == dev)
695 return drmSyncobjReset(dev->fd, syncobjs, syncobj_count);
698 drm_public int amdgpu_cs_syncobj_signal(amdgpu_device_handle dev,
702 if (NULL == dev)
705 return drmSyncobjSignal(dev->fd, syncobjs, syncobj_count);
708 drm_public int amdgpu_cs_syncobj_timeline_signal(amdgpu_device_handle dev,
713 if (NULL == dev)
716 return drmSyncobjTimelineSignal(dev->fd, syncobjs,
720 drm_public int amdgpu_cs_syncobj_wait(amdgpu_device_handle dev,
725 if (NULL == dev)
728 return drmSyncobjWait(dev->fd, handles, num_handles, timeout_nsec,
732 drm_public int amdgpu_cs_syncobj_timeline_wait(amdgpu_device_handle dev,
738 if (NULL == dev)
741 return drmSyncobjTimelineWait(dev->fd, handles, points, num_handles,
745 drm_public int amdgpu_cs_syncobj_query(amdgpu_device_handle dev,
749 if (NULL == dev)
752 return drmSyncobjQuery(dev->fd, handles, points, num_handles);
755 drm_public int amdgpu_cs_syncobj_query2(amdgpu_device_handle dev,
759 if (!dev)
762 return drmSyncobjQuery2(dev->fd, handles, points, num_handles, flags);
765 drm_public int amdgpu_cs_export_syncobj(amdgpu_device_handle dev,
769 if (NULL == dev)
772 return drmSyncobjHandleToFD(dev->fd, handle, shared_fd);
775 drm_public int amdgpu_cs_import_syncobj(amdgpu_device_handle dev,
779 if (NULL == dev)
782 return drmSyncobjFDToHandle(dev->fd, shared_fd, handle);
785 drm_public int amdgpu_cs_syncobj_export_sync_file(amdgpu_device_handle dev,
789 if (NULL == dev)
792 return drmSyncobjExportSyncFile(dev->fd, syncobj, sync_file_fd);
795 drm_public int amdgpu_cs_syncobj_import_sync_file(amdgpu_device_handle dev,
799 if (NULL == dev)
802 return drmSyncobjImportSyncFile(dev->fd, syncobj, sync_file_fd);
805 drm_public int amdgpu_cs_syncobj_export_sync_file2(amdgpu_device_handle dev,
814 if (NULL == dev)
818 return drmSyncobjExportSyncFile(dev->fd, syncobj, sync_file_fd);
820 ret = drmSyncobjCreate(dev->fd, 0, &binary_handle);
824 ret = drmSyncobjTransfer(dev->fd, binary_handle, 0,
828 ret = drmSyncobjExportSyncFile(dev->fd, binary_handle, sync_file_fd);
830 drmSyncobjDestroy(dev->fd, binary_handle);
834 drm_public int amdgpu_cs_syncobj_import_sync_file2(amdgpu_device_handle dev,
842 if (NULL == dev)
846 return drmSyncobjImportSyncFile(dev->fd, syncobj, sync_file_fd);
848 ret = drmSyncobjCreate(dev->fd, 0, &binary_handle);
851 ret = drmSyncobjImportSyncFile(dev->fd, binary_handle, sync_file_fd);
854 ret = drmSyncobjTransfer(dev->fd, syncobj, point,
857 drmSyncobjDestroy(dev->fd, binary_handle);
861 drm_public int amdgpu_cs_syncobj_transfer(amdgpu_device_handle dev,
868 if (NULL == dev)
871 return drmSyncobjTransfer(dev->fd,
877 drm_public int amdgpu_cs_submit_raw(amdgpu_device_handle dev,
898 r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_CS,
908 drm_public int amdgpu_cs_submit_raw2(amdgpu_device_handle dev,
927 r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_CS,
951 drm_public int amdgpu_cs_fence_to_handle(amdgpu_device_handle dev,
967 r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_FENCE_TO_HANDLE,