Lines Matching full:param
504 * \param fd - \c [in] File descriptor for AMD GPU device
510 * \param major_version - \c [out] Major version of library. It is assumed
513 * \param minor_version - \c [out] Minor version of library
514 * \param device_handle - \c [out] Pointer to opaque context which should
536 * \param device_handle - \c [in] Context associated with file
551 * /param device_handle - \c [in] Device handle.
570 * \param dev - \c [in] Device handle.
572 * \param alloc_buffer - \c [in] Pointer to the structure describing an
574 * \param buf_handle - \c [out] Allocated buffer handle
588 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
589 * \param buf_handle - \c [in] Buffer handle
590 * \param info - \c [in] Metadata to associated with buffer
602 * \param dev - \c [in] Device handle.
604 * \param buf_handle - \c [in] Buffer handle
605 * \param info - \c [out] Structure describing buffer
618 * \param dev - \c [in] Device handle.
620 * \param buf_handle - \c [in] Buffer handle
621 * \param type - \c [in] Type of handle requested
622 * \param shared_handle - \c [out] Special "shared" handle
637 * \param dev - \c [in] Device handle.
639 * \param type - \c [in] Type of handle requested
640 * \param shared_handle - \c [in] Shared handle received as result "import"
642 * \param output - \c [out] Pointer to structure with information
662 * \param dev - [in] Device handle. See #amdgpu_device_initialize()
663 * \param cpu - [in] CPU address of user allocated memory which we
666 * \param size - [in] Size of allocation (must be correctly aligned)
667 * \param buf_handle - [out] Buffer handle for the userptr memory
697 * \param dev - [in] Device handle. See #amdgpu_device_initialize()
698 * \param cpu - [in] CPU address of user allocated memory which we
701 * \param size - [in] Size of allocation (must be correctly aligned)
702 * \param buf_handle - [out] Buffer handle for the userptr memory
704 * \param offset_in_bo - [out] offset in this BO for this user memory
720 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
721 * \param buf_handle - \c [in] Buffer handle to free
740 * \param bo - \c [in] Buffer object handle to increase the reference count
750 * \param buf_handle - \c [in] Buffer handle
751 * \param cpu - \c [out] CPU address to be used for access
764 * \param buf_handle - \c [in] Buffer handle
777 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
778 * \param buf_handle - \c [in] Buffer handle.
779 * \param timeout_ns - Timeout in nanoseconds.
780 * \param buffer_busy - 0 if buffer is idle, all GPU access was completed
794 * \param dev - \c [in] Device handle.
796 * \param number_of_buffers - \c [in] Number of BOs in the list
797 * \param buffers - \c [in] List of BO handles
798 * \param result - \c [out] Created BO list handle
813 * \param bo_list - \c [in] BO list handle.
825 * \param dev - \c [in] Device handle.
827 * \param number_of_resources - \c [in] Number of BOs in the list
828 * \param resources - \c [in] List of BO handles
829 * \param resource_prios - \c [in] Optional priority for each handle
830 * \param result - \c [out] Created BO list handle
846 * \param handle - \c [in] BO list handle.
858 * \param handle - \c [in] BO list handle
859 * \param number_of_resources - \c [in] Number of BOs in the list
860 * \param resources - \c [in] List of BO handles
861 * \param resource_prios - \c [in] Optional priority for each handle
888 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
889 * \param priority - \c [in] Context creation flags. See AMDGPU_CTX_PRIORITY_*
890 * \param context - \c [out] GPU Context handle
917 * \param context - \c [in] GPU Context handle
930 * \param dev - \c [in] device handle
931 * \param context - \c [in] context handle for context id
932 * \param master_fd - \c [in] The master fd to authorize the override.
933 * \param priority - \c [in] The priority to assign to the context.
945 * \param dev - \c [in] device handle
946 * \param op - \c [in] AMDGPU_CTX_OP_{GET,SET}_STABLE_PSTATE
947 * \param flags - \c [in] AMDGPU_CTX_STABLE_PSTATE_*
948 * \param out_flags - \c [out] output current stable pstate
960 * \param context - \c [in] GPU Context handle
961 * \param state - \c [out] One of AMDGPU_CTX_*_RESET
962 * \param hangs - \c [out] Number of hangs caused by the context.
976 * \param context - \c [in] GPU Context handle
977 * \param flags - \c [out] A combination of AMDGPU_CTX_QUERY2_FLAGS_*
1007 * \param dev - \c [in] Device handle.
1009 * \param context - \c [in] GPU Context
1010 * \param flags - \c [in] Global submission flags
1011 * \param ibs_request - \c [in/out] Pointer to submission requests.
1015 * \param number_of_requests - \c [in] Number of submission requests
1037 * \param fence - \c [in] Structure describing fence to query
1038 * \param timeout_ns - \c [in] Timeout value to wait
1039 * \param flags - \c [in] Flags for the query
1040 * \param expired - \c [out] If fence expired or not.\n
1062 * \param fences - \c [in] The fence array to wait
1063 * \param fence_count - \c [in] The fence count
1064 * \param wait_all - \c [in] If true, wait all fences to be signaled,
1066 * \param timeout_ns - \c [in] The timeout to wait, in nanoseconds
1067 * \param status - \c [out] '1' for signaled, '0' for timeout
1068 * \param first - \c [out] the index of the first signaled fence from @fences
1094 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
1095 * \param info - \c [out] Pointer to structure to get size alignment
1109 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
1110 * \param fw_type - \c [in] AMDGPU_INFO_FW_*
1111 * \param ip_instance - \c [in] Index of the IP block of the same type.
1112 * \param index - \c [in] Index of the engine. (for SDMA and MEC)
1113 * \param version - \c [out] Pointer to to the "version" return value
1114 * \param feature - \c [out] Pointer to to the "feature" return value
1127 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
1128 * \param type - \c [in] Hardware IP block type = AMDGPU_HW_IP_*
1129 * \param count - \c [out] Pointer to structure to get information
1143 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
1144 * \param type - \c [in] Hardware IP block type = AMDGPU_HW_IP_*
1145 * \param ip_instance - \c [in] Index of the IP block of the same type.
1146 * \param info - \c [out] Pointer to structure to get information
1161 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
1162 * \param heap - \c [in] Heap type
1163 * \param info - \c [in] Pointer to structure to get needed information
1175 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
1176 * \param id - \c [in] Mode object ID
1177 * \param result - \c [in] Pointer to the CRTC ID
1191 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
1192 * \param heap - \c [in] Heap type
1193 * \param info - \c [in] Pointer to structure to get needed information
1208 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
1209 * \param info_id - \c [in] AMDGPU_INFO_*
1210 * \param size - \c [in] Size of the returned value.
1211 * \param value - \c [out] Pointer to the return value.
1226 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
1227 * \param info - \c [in] amdgpu_sw_info_*
1228 * \param value - \c [out] Pointer to the return value.
1240 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
1241 * \param gds_info - \c [out] Pointer to structure to get GDS information
1256 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
1257 * \param sensor_type - \c [in] AMDGPU_INFO_SENSOR_*
1258 * \param size - \c [in] Size of the returned value.
1259 * \param value - \c [out] Pointer to the return value.
1273 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
1274 * \param caps_type - \c [in] AMDGPU_INFO_VIDEO_CAPS_DECODE(ENCODE)
1275 * \param size - \c [in] Size of the returned value.
1276 * \param value - \c [out] Pointer to the return value.
1289 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize(
1290 * \param dword_offset - \c [in] Register offset in dwords
1291 * \param count - \c [in] The number of registers to read starting
1293 * \param instance - \c [in] GRBM_GFX_INDEX selector. It may have other
1295 * \param flags - \c [in] Flags with additional information.
1296 * \param values - \c [out] The pointer to return values.
1316 * \param dev - [in] Device handle. See #amdgpu_device_initialize()
1317 * \param va_range_type - \c [in] Type of MC va range from which to allocate
1318 * \param size - \c [in] Size of range. Size must be correctly* aligned.
1321 * \param va_base_alignment - \c [in] Overwrite base address alignment
1326 * \param va_base_required - \c [in] Specified required va base address.
1330 * \param va_base_allocated - \c [out] On return: Allocated VA base to be used
1332 * \param va_range_handle - \c [out] On return: Handle assigned to allocation
1333 * \param flags - \c [in] flags for special VA range
1362 * \param va_range_handle - \c [in] Handle assigned to VA allocation
1377 * \param dev - [in] Device handle. See #amdgpu_device_initialize()
1378 * \param type - \c [in] Type of virtual address range
1379 * \param offset - \c [out] Start offset of virtual address range
1380 * \param size - \c [out] Size of virtual address range
1395 * \param bo - \c [in] BO handle
1396 * \param offset - \c [in] Start offset to map
1397 * \param size - \c [in] Size to map
1398 * \param addr - \c [in] Start virtual address.
1399 * \param flags - \c [in] Supported flags for mapping/unmapping
1400 * \param ops - \c [in] AMDGPU_VA_OP_MAP or AMDGPU_VA_OP_UNMAP
1421 * \param dev - \c [in] device handle
1422 * \param bo - \c [in] BO handle (may be NULL)
1423 * \param offset - \c [in] Start offset to map
1424 * \param size - \c [in] Size to map
1425 * \param addr - \c [in] Start virtual address.
1426 * \param flags - \c [in] Supported flags for mapping/unmapping
1427 * \param ops - \c [in] AMDGPU_VA_OP_MAP or AMDGPU_VA_OP_UNMAP
1445 * \param sem - \c [out] semaphore handle
1456 * \param context - \c [in] GPU Context
1457 * \param ip_type - \c [in] Hardware IP block type = AMDGPU_HW_IP_*
1458 * \param ip_instance - \c [in] Index of the IP block of the same type
1459 * \param ring - \c [in] Specify ring index of the IP
1460 * \param sem - \c [in] semaphore handle
1475 * \param context - \c [in] GPU Context
1476 * \param ip_type - \c [in] Hardware IP block type = AMDGPU_HW_IP_*
1477 * \param ip_instance - \c [in] Index of the IP block of the same type
1478 * \param ring - \c [in] Specify ring index of the IP
1479 * \param sem - \c [in] semaphore handle
1494 * \param sem - \c [in] semaphore handle
1505 * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
1515 * \param dev - \c [in] device handle
1516 * \param flags - \c [in] flags that affect creation
1517 * \param syncobj - \c [out] sync object handle
1530 * \param dev - \c [in] device handle
1531 * \param syncobj - \c [out] sync object handle
1542 * \param dev - \c [in] device handle
1543 * \param syncobj - \c [in] sync object handle
1555 * \param dev - \c [in] device handle
1556 * \param syncobjs - \c [in] array of sync object handles
1557 * \param syncobj_count - \c [in] number of handles in syncobjs
1569 * \param dev - \c [in] device handle
1570 * \param syncobjs - \c [in] array of sync object handles
1571 * \param syncobj_count - \c [in] number of handles in syncobjs
1583 * \param dev - \c [in] device handle
1584 * \param syncobjs - \c [in] array of sync object handles
1585 * \param points - \c [in] array of timeline points
1586 * \param syncobj_count - \c [in] number of handles in syncobjs
1600 * \param dev - \c [in] self-explanatory
1601 * \param handles - \c [in] array of sync object handles
1602 * \param num_handles - \c [in] self-explanatory
1603 * \param timeout_nsec - \c [in] self-explanatory
1604 * \param flags - \c [in] a bitmask of DRM_SYNCOBJ_WAIT_FLAGS_*
1605 * \param first_signaled - \c [in] self-explanatory
1620 * \param dev - \c [in] self-explanatory
1621 * \param handles - \c [in] array of sync object handles
1622 * \param points - \c [in] array of sync points to wait
1623 * \param num_handles - \c [in] self-explanatory
1624 * \param timeout_nsec - \c [in] self-explanatory
1625 * \param flags - \c [in] a bitmask of DRM_SYNCOBJ_WAIT_FLAGS_*
1626 * \param first_signaled - \c [in] self-explanatory
1641 * \param dev - \c [in] self-explanatory
1642 * \param handles - \c [in] array of sync object handles
1643 * \param points - \c [out] array of sync points returned, which presents
1645 * \param num_handles - \c [in] self-explanatory
1658 * \param dev - \c [in] self-explanatory
1659 * \param handles - \c [in] array of sync object handles
1660 * \param points - \c [out] array of sync points returned, which presents
1662 * \param num_handles - \c [in] self-explanatory
1663 * \param flags - \c [in] a bitmask of DRM_SYNCOBJ_QUERY_FLAGS_*
1677 * \param dev - \c [in] device handle
1678 * \param syncobj - \c [in] sync object handle
1679 * \param shared_fd - \c [out] shared file descriptor.
1691 * \param dev - \c [in] device handle
1692 * \param shared_fd - \c [in] shared file descriptor.
1693 * \param syncobj - \c [out] sync object handle
1706 * \param dev - \c [in] device handle
1707 * \param syncobj - \c [in] sync object handle
1708 * \param sync_file_fd - \c [out] sync_file file descriptor.
1721 * \param dev - \c [in] device handle
1722 * \param syncobj - \c [in] sync object handle
1723 * \param sync_file_fd - \c [in] sync_file file descriptor.
1735 * \param dev - \c [in] device handle
1736 * \param syncobj - \c [in] sync object handle
1737 * \param point - \c [in] timeline point
1738 * \param flags - \c [in] flags
1739 * \param sync_file_fd - \c [out] sync_file file descriptor.
1754 * \param dev - \c [in] device handle
1755 * \param syncobj - \c [in] sync object handle
1756 * \param point - \c [in] timeline point
1757 * \param sync_file_fd - \c [in] sync_file file descriptor.
1771 * \param dev - \c [in] device handle
1772 * \param dst_handle - \c [in] sync object handle
1773 * \param dst_point - \c [in] timeline point, 0 presents dst is binary
1774 * \param src_handle - \c [in] sync object handle
1775 * \param src_point - \c [in] timeline point, 0 presents src is binary
1776 * \param flags - \c [in] flags
1792 * \param what AMDGPU_FENCE_TO_HANDLE_GET_{SYNCOBJ, FD}
1793 * \param out_handle returned handle
1806 * \param dev - \c [in] device handle
1807 * \param context - \c [in] context handle for context id
1808 * \param bo_list_handle - \c [in] request bo list handle (0 for none)
1809 * \param num_chunks - \c [in] number of CS chunks to submit
1810 * \param chunks - \c [in] array of CS chunks
1811 * \param seq_no - \c [out] output sequence number for submission.
1831 * \param dev - \c [in] device handle
1832 * \param context - \c [in] context handle for context id
1833 * \param bo_list_handle - \c [in] raw bo list handle (0 for none)
1834 * \param num_chunks - \c [in] number of CS chunks to submit
1835 * \param chunks - \c [in] array of CS chunks
1836 * \param seq_no - \c [out] output sequence number for submission.
1857 * \param context - \c [in] GPU Context
1858 * \param flags - \c [in] TBD
1866 * \param context - \c [in] GPU Context
1867 * \param flags - \c [in] TBD