Lines Matching refs:dword
125 PUSH dword [ctxq+ResampleContext.dst_incr_div]
126 PUSH dword [ctxq+ResampleContext.dst_incr_mod]
127 PUSH dword [ctxq+ResampleContext.filter_alloc]
129 PUSH dword [ctxq+ResampleContext.phase_count] ; unneeded replacement for phase_mask
130 PUSH dword [ctxq+ResampleContext.src_incr]
145 %define filter_bankq dword [rsp+0x0]
146 %define min_filter_length_x4q dword [rsp+0x4]
147 %define src_incrd dword [rsp+0x8]
148 %define phase_maskd dword [rsp+0xc]
149 %define dst_endq dword [rsp+0x10]
150 %define filter_allocd dword [rsp+0x14]
151 %define dst_incr_modd dword [rsp+0x18]
152 %define dst_incr_divd dword [rsp+0x1c]
254 cmp dword update_context_stackd, 0
357 PUSH dword [ctxq+ResampleContext.dst_incr_div]
359 mov r3, dword [ctxq+ResampleContext.filter_alloc]
360 PUSH dword [ctxq+ResampleContext.dst_incr_mod]
364 mov r3, dword [ctxq+ResampleContext.src_incr]
365 PUSH dword [ctxq+ResampleContext.phase_count] ; unneeded replacement of phase_mask
384 PUSH dword [ctxq+ResampleContext.phase_count]
388 %define phase_count_stackd dword [rsp+0x0]
389 %define filter_bankq dword [rsp+0x4]
390 %define min_filter_length_x4q dword [rsp+0x8]
391 %define src_incrd dword [rsp+0xc]
392 %define phase_mask_stackd dword [rsp+0x10]
393 %define filter_alloc_x4q dword [rsp+0x14]
394 %define filter_allocd dword [rsp+0x18]
395 %define dst_incr_modd dword [rsp+0x1c]
396 %define dst_endq dword [rsp+0x20]
397 %define dst_incr_divd dword [rsp+0x24]
562 cmp dword update_context_stackd, 0