Lines Matching refs:out2
196 Outputs - out0, out1, out2, out3
199 Loads word in 'out2' from (psrc + 2 * stride)
202 #define LW4(psrc, stride, out0, out1, out2, out3) \
206 out2 = LW((psrc) + 2 * stride); \
228 #define LD4(psrc, stride, out0, out1, out2, out3) \
231 LD2((psrc) + 2 * stride, stride, out2, out3); \
283 #define LD_V3(RTYPE, psrc, stride, out0, out1, out2) \
286 out2 = LD_V(RTYPE, (psrc) + 2 * stride); \
291 #define LD_V4(RTYPE, psrc, stride, out0, out1, out2, out3) \
294 LD_V2(RTYPE, (psrc) + 2 * stride , stride, out2, out3); \
302 #define LD_V5(RTYPE, psrc, stride, out0, out1, out2, out3, out4) \
304 LD_V4(RTYPE, (psrc), stride, out0, out1, out2, out3); \
310 #define LD_V6(RTYPE, psrc, stride, out0, out1, out2, out3, out4, out5) \
312 LD_V4(RTYPE, (psrc), stride, out0, out1, out2, out3); \
321 out0, out1, out2, out3, out4, out5, out6) \
323 LD_V5(RTYPE, (psrc), stride, out0, out1, out2, out3, out4); \
330 out0, out1, out2, out3, out4, out5, out6, out7) \
332 LD_V4(RTYPE, (psrc), stride, out0, out1, out2, out3); \
342 out0, out1, out2, out3, out4, out5, out6, out7, \
346 out0, out1, out2, out3, out4, out5, out6, out7); \
598 out0, out1, out2, out3) \
601 AVER_UB2(RTYPE, in4, in5, in6, in7, out2, out3) \
628 out0, out1, out2) \
631 SLDI_B(RTYPE, d2, s2, slide_val, out2) \
638 slide_val, out0, out1, out2, out3) \
641 SLDI_B2(RTYPE, d2, s2, d3, s3, slide_val, out2, out3) \
667 out0, out1, out2) \
670 out2 = (RTYPE) __msa_vshf_b((v16i8) mask2, (v16i8) in5, (v16i8) in4); \
675 out0, out1, out2, out3) \
678 VSHF_B2(RTYPE, in0, in1, in0, in1, mask2, mask3, out2, out3); \
700 out0, out1, out2) \
703 out2 = (RTYPE) __msa_vshf_h((v8i16) mask2, (v8i16) in5, (v8i16) in4); \
744 out0, out1, out2, out3) \
747 DOTP_UB2(RTYPE, mult2, mult3, cnst2, cnst3, out2, out3); \
771 out0, out1, out2) \
774 out2 = (RTYPE) __msa_dotp_s_h((v16i8) mult2, (v16i8) cnst2); \
779 cnst0, cnst1, cnst2, cnst3, out0, out1, out2, out3) \
782 DOTP_SB2(RTYPE, mult2, mult3, cnst2, cnst3, out2, out3); \
807 out0, out1, out2, out3) \
810 DOTP_SH2(RTYPE, mult2, mult3, cnst2, cnst3, out2, out3); \
836 cnst0, cnst1, cnst2, cnst3, out0, out1, out2, out3) \
839 DPADD_SB2(RTYPE, mult2, mult3, cnst2, cnst3, out2, out3); \
886 cnst0, cnst1, cnst2, cnst3, out0, out1, out2, out3) \
889 DPADD_SH2(RTYPE, mult2, mult3, cnst2, cnst3, out2, out3); \
1046 #define HADD_SB4(RTYPE, in0, in1, in2, in3, out0, out1, out2, out3) \
1049 HADD_SB2(RTYPE, in2, in3, out2, out3); \
1069 #define HADD_UB3(RTYPE, in0, in1, in2, out0, out1, out2) \
1072 out2 = (RTYPE) __msa_hadd_u_h((v16u8) in2, (v16u8) in2); \
1076 #define HADD_UB4(RTYPE, in0, in1, in2, in3, out0, out1, out2, out3) \
1079 HADD_UB2(RTYPE, in2, in3, out2, out3); \
1101 #define HSUB_UB4(RTYPE, in0, in1, in2, in3, out0, out1, out2, out3) \
1104 HSUB_UB2(RTYPE, in2, in3, out2, out3); \
1268 out0, out1, out2, out3) \
1271 ILVL_B2(RTYPE, in4, in5, in6, in7, out2, out3); \
1296 out0, out1, out2, out3) \
1299 ILVL_H2(RTYPE, in4, in5, in6, in7, out2, out3); \
1324 Outputs - out0, out1, out2, out3
1343 #define ILVR_B3(RTYPE, in0, in1, in2, in3, in4, in5, out0, out1, out2) \
1346 out2 = (RTYPE) __msa_ilvr_b((v16i8) in4, (v16i8) in5); \
1354 out0, out1, out2, out3) \
1357 ILVR_B2(RTYPE, in4, in5, in6, in7, out2, out3); \
1367 out0, out1, out2, out3, out4, out5, out6, out7) \
1370 out0, out1, out2, out3); \
1379 Outputs - out0, out1, out2, out3
1395 #define ILVR_H3(RTYPE, in0, in1, in2, in3, in4, in5, out0, out1, out2) \
1398 out2 = (RTYPE) __msa_ilvr_h((v8i16) in4, (v8i16) in5); \
1403 out0, out1, out2, out3) \
1406 ILVR_H2(RTYPE, in4, in5, in6, in7, out2, out3); \
1421 out0, out1, out2, out3) \
1424 ILVR_W2(RTYPE, in4, in5, in6, in7, out2, out3); \
1431 Outputs - out0, out1, out2, out3
1447 #define ILVR_D3(RTYPE, in0, in1, in2, in3, in4, in5, out0, out1, out2) \
1450 out2 = (RTYPE) __msa_ilvr_d((v2i64) in4, (v2i64) in5); \
1455 out0, out1, out2, out3) \
1458 ILVR_D2(RTYPE, in4, in5, in6, in7, out2, out3); \
1659 out0, out1, out2) \
1662 out2 = (RTYPE) __msa_splati_h((v8i16) in, idx2); \
1668 out0, out1, out2, out3) \
1671 SPLATI_H2(RTYPE, in, idx2, idx3, out2, out3); \
1695 #define SPLATI_W4(RTYPE, in, out0, out1, out2, out3) \
1698 SPLATI_W2(RTYPE, in, 2, out2, out3); \
1724 #define PCKEV_B3(RTYPE, in0, in1, in2, in3, in4, in5, out0, out1, out2) \
1727 out2 = (RTYPE) __msa_pckev_b((v16i8) in4, (v16i8) in5); \
1733 out0, out1, out2, out3) \
1736 PCKEV_B2(RTYPE, in4, in5, in6, in7, out2, out3); \
1763 out0, out1, out2, out3) \
1766 PCKEV_H2(RTYPE, in4, in5, in6, in7, out2, out3); \
1792 out0, out1, out2, out3) \
1795 PCKEV_D2(RTYPE, in4, in5, in6, in7, out2, out3); \
1900 out0, out1, out2, out3) \
1903 ADDS_SH2(RTYPE, in4, in5, in6, in7, out2, out3); \
2106 #define MUL4(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, out3) \
2109 MUL2(in4, in5, in6, in7, out2, out3); \
2123 #define ADD4(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, out3) \
2126 ADD2(in4, in5, in6, in7, out2, out3); \
2140 #define SUB4(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, out3) \
2144 out2 = in4 - in5; \
2246 Outputs - out0, out1, out2, out3
2249 #define BUTTERFLY_4(in0, in1, in2, in3, out0, out1, out2, out3) \
2254 out2 = in1 - in2; \
2264 out0, out1, out2, out3, out4, out5, out6, out7) \
2268 out2 = in2 + in5; \
2284 out0, out1, out2, out3, out4, out5, out6, out7, \
2289 out2 = in2 + in13; \
2308 Outputs - out0, out1, out2, out3 (output 4x4 byte block)
2312 #define TRANSPOSE4x4_UB_UB(in0, in1, in2, in3, out0, out1, out2, out3) \
2322 out2 = (v16u8) __msa_sldi_b(zero_m, (v16i8) out1, 4); \
2323 out3 = (v16u8) __msa_sldi_b(zero_m, (v16i8) out2, 4); \
2328 Outputs - out0, out1, out2, out3 (output 4x8 byte block)
2333 out0, out1, out2, out3) \
2344 ILVRL_W2(RTYPE, tmp1_m, tmp0_m, out0, out2); \
2345 out1 = (RTYPE) __msa_ilvl_d((v2i64) out2, (v2i64) out0); \
2346 out3 = (RTYPE) __msa_ilvl_d((v2i64) out0, (v2i64) out2); \
2354 Outputs - out0, out1, out2, out3, out4, out5, out6, out7
2360 out0, out1, out2, out3, out4, out5, out6, out7) \
2370 ILVRL_W2(RTYPE, tmp6_m, tmp4_m, out0, out2); \
2372 SLDI_B4(RTYPE, zeros, out0, zeros, out2, zeros, out4, zeros, out6, \
2381 Outputs - out0, out1, out2, out3
2387 out0, out1, out2, out3) \
2405 out2 = (v16u8) __msa_ilvod_h((v8i16) tmp1_m, (v8i16) tmp0_m); \
2416 Outputs - out0, out1, out2, out3, out4, out5, out6, out7
2422 out0, out1, out2, out3, out4, out5, out6, out7) \
2429 ILVEV_D2_UB(in4, in12, in5, in13, out3, out2); \
2436 out5 = (v16u8) __msa_ilvev_b((v16i8) out2, (v16i8) out3); \
2437 tmp6_m = (v16u8) __msa_ilvod_b((v16i8) out2, (v16i8) out3); \
2447 out2 = (v16u8) __msa_ilvev_w((v4i32) tmp3_m, (v4i32) tmp2_m); \
2462 Outputs - out0, out1, out2, out3
2466 #define TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, out0, out1, out2, out3) \
2471 ILVRL_W2_SH(s1_m, s0_m, out0, out2); \
2473 out3 = (v8i16) __msa_ilvl_d((v2i64) out0, (v2i64) out2); \
2478 Outputs - out0, out1, out2, out3, out4, out5, out6, out7
2483 out0, out1, out2, out3, out4, out5, out6, out7) \
2498 tmp3_m, tmp7_m, out0, out2, out4, out6); \
2509 Outputs - out0, out1, out2, out3
2513 #define TRANSPOSE4x4_SW_SW(in0, in1, in2, in3, out0, out1, out2, out3) \
2522 out2 = (v4i32) __msa_ilvr_d((v2i64) s3_m, (v2i64) s1_m); \