Lines Matching refs:SHIFT_FRW_COL
54 #define SHIFT_FRW_COL BITS_FRW_ACC
57 //#define RND_FRW_COL (1 << (SHIFT_FRW_COL-1))
228 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"0 \n\t" \
232 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"4 \n\t" \
240 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"5 \n\t" \
242 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"7 \n\t" \
248 "psllw $"S(SHIFT_FRW_COL)"+1, %%"#mm"2 \n\t" \
256 "psllw $"S(SHIFT_FRW_COL)"+1, %%"#mm"3 \n\t" \
266 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"1 \n\t" \
274 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"3 \n\t" \