Lines Matching defs:zero
36 v16i8 zero = { 0 };
45 in0 = (v8i16) __msa_ilvr_b(zero, src0);
55 ILVR_B2_SH(zero, src0, zero, src1, in0, in1);
71 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
85 v16i8 zero = { 0 };
93 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
95 ILVR_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7,
108 v16i8 zero = { 0 };
116 ILVR_B2_SH(zero, src0, zero, src1, in0, in1);
126 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
136 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
138 ILVR_B2_SH(zero, src4, zero, src5, in4, in5);
153 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
155 ILVR_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7,
170 v16i8 zero = { 0 };
178 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
182 ILVR_B2_SH(zero, src0, zero, src1, in0, in1);
189 ILVR_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7,
193 ILVR_B2_SH(zero, src0, zero, src1, in0, in1);
206 v16i8 zero = { 0 };
215 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
217 ILVL_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
233 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
235 ILVL_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
243 ILVR_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7,
245 ILVL_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7,
253 ILVR_B4_SH(zero, src8, zero, src9, zero, src10, zero, src11,
255 ILVL_B4_SH(zero, src8, zero, src9, zero, src10, zero, src11,
270 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3, in0_r,
272 ILVL_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3, in0_l,
280 ILVR_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7, in0_r,
282 ILVL_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7, in0_l,
298 v16i8 zero = { 0 };
306 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3, in0_r, in1_r,
308 ILVL_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3, in0_l, in1_l,
314 ILVR_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7, in0_r, in1_r,
327 v16i8 zero = { 0 };
336 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3, in0_r, in1_r,
338 ILVL_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3, in0_l, in1_l,
347 ILVR_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7, in0_r, in1_r,
349 ILVL_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7, in0_l, in1_l,
365 v16i8 zero = { 0 };
381 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
383 ILVL_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
385 ILVR_B2_SH(zero, src4, zero, src5, in4_r, in5_r);
386 ILVL_B2_SH(zero, src4, zero, src5, in4_l, in5_l);
395 ILVR_B4_SH(zero, src6, zero, src7, zero, src8, zero, src9,
397 ILVL_B4_SH(zero, src6, zero, src7, zero, src8, zero, src9,
399 ILVR_B2_SH(zero, src10, zero, src11, in4_r, in5_r);
400 ILVL_B2_SH(zero, src10, zero, src11, in4_l, in5_l);
416 v16i8 zero = { 0 };
426 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
428 ILVL_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3,
436 ILVR_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7,
438 ILVL_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7,