Lines Matching defs:zero

29     v16u8 zero = { 0 };
41 src0_r = (v8i16) __msa_ilvr_b((v16i8) zero, (v16i8) src0);
710 v16i8 zero = { 0 };
730 q1_org_r = (v8i16) __msa_ilvr_b(zero, (v16i8) q1_org);
731 q1_org_l = (v8i16) __msa_ilvl_b(zero, (v16i8) q1_org);
743 ILVR_B2_SH(zero, p3_org, zero, p2_org, p3_org_r, p2_r);
747 ILVL_B2_SH(zero, p3_org, zero, p2_org, p3_org_l, p2_l);
788 ILVR_B2_SH(zero, q3_org, zero, q2_org, q3_org_r, q2_r);
792 ILVL_B2_SH(zero, q3_org, zero, q2_org, q3_org_l, q2_l);
862 v16i8 zero = { 0 };
892 ILVR_B2_SH(zero, p3_org, zero, p2_org, p3_org_r, p2_r);
896 ILVL_B2_SH(zero, p3_org, zero, p2_org, p3_org_l, p2_l);
929 ILVR_B2_SH(zero, q3_org, zero, q2_org, q3_org_r, q2_r);
933 ILVL_B2_SH(zero, q3_org, zero, q2_org, q3_org_l, q2_l);
1185 v16i8 zero = { 0 };
1206 is_less_than = (v16u8) __msa_ilvr_d((v2i64) zero, (v2i64) is_less_than);
1209 ILVR_B4_SH(zero, p1_or_q1_org, zero, p0_or_q0_org, zero, q0_or_p0_org,
1210 zero, q1_or_p1_org, p1_org_r, p0_org_r, q0_org_r, q1_org_r);
1213 PCKEV_B2_SH(zero, p0_or_q0, zero, q0_or_p0, p0_or_q0, q0_or_p0);
1234 v16i8 zero = { 0 };
1262 is_less_than = (v16u8) __msa_ilvr_d((v2i64) zero, (v2i64) is_less_than);
1265 ILVR_B4_SH(zero, p1_or_q1_org, zero, p0_or_q0_org, zero, q0_or_p0_org,
1266 zero, q1_or_p1_org, p1_org_r, p0_org_r, q0_org_r, q1_org_r);
1272 PCKEV_B2_SH(zero, p0_or_q0, zero, q0_or_p0, p0_or_q0, q0_or_p0);
1304 v16i8 zero = { 0 };
1309 negTc = zero - tc;
1335 ILVRL_B2_SH(zero, p0, p0_r, p0_l);
1336 ILVRL_B2_SH(zero, p1, p1_r, p1_l);
1337 ILVRL_B2_SH(zero, p2, p2_r, p2_l);
1338 ILVRL_B2_SH(zero, q0, q0_r, q0_l);
1339 ILVRL_B2_SH(zero, q1, q1_r, q1_l);
1340 ILVRL_B2_SH(zero, q2, q2_r, q2_l);
1342 flags = __msa_clt_s_b(tc, zero);
1344 flags = __msa_clt_s_b(negTc, zero);
1349 flags = __msa_ceq_b(flags, zero);
1352 flags = __msa_ceq_b(flags, zero);
1354 negiTc = zero - iTc;
1356 flags = __msa_clt_s_b(iTc, zero);
1358 flags = __msa_clt_s_b(negiTc, zero);
1381 t3 = __msa_cle_s_h((v8i16)zero, t1);
1382 flags = (v16i8)__msa_ceq_h(t2, (v8i16)zero);
1387 t3 = __msa_cle_s_h((v8i16)zero, t1);
1388 flags = (v16i8)__msa_ceq_h(t2, (v8i16)zero);
1411 t3 = __msa_cle_s_h((v8i16)zero, t1);
1412 flags = (v16i8)__msa_ceq_h(t2, (v8i16)zero);
1417 t3 = __msa_cle_s_h((v8i16)zero, t1);
1418 flags = (v16i8)__msa_ceq_h(t2, (v8i16)zero);
1424 flags = (v16i8)__msa_cle_s_b(zero, tc);
1429 t1 = (v8i16)(flags & (~(__msa_ceq_b((v16i8)bDetaP2P0, zero))));
1431 t2 = (v8i16)(flags & (~(__msa_ceq_b((v16i8)bDetaQ2Q0, zero))));
1472 v16i8 zero = { 0 };
1490 is_bs_greater_than0 = ((v16u8) zero < bs);
1508 negate_tc = zero - tc;
1526 v8i16 p2_org_r = (v8i16) __msa_ilvr_b(zero, (v16i8) p2_org);
1527 v8i16 p2_org_l = (v8i16) __msa_ilvl_b(zero, (v16i8) p2_org);
1546 q1_org_r = (v8i16) __msa_ilvr_b(zero, (v16i8) q1_org);
1547 q1_org_l = (v8i16) __msa_ilvl_b(zero, (v16i8) q1_org);
1553 v8i16 q2_org_r = (v8i16) __msa_ilvr_b(zero, (v16i8) q2_org);
1554 v8i16 q2_org_l = (v8i16) __msa_ilvl_b(zero, (v16i8) q2_org);
1573 negate_thresh = zero - tc;
1576 ILVR_B2_SH(zero, tc, sign_negate_thresh, negate_thresh,
1581 threshold_l = (v8i16) __msa_ilvl_b(zero, tc);
1839 v16i8 zero = { 0 };
1860 is_bs_greater_than0 = (v16u8) (zero < (v16i8) bs);
1879 is_less_than = (v16u8) __msa_ilvr_d((v2i64) zero, (v2i64) is_less_than);
1882 negate_tc = zero - (v16i8) tc;
1885 ILVR_B2_SH(zero, tc, sign_negate_tc, negate_tc, tc_r, negate_tc_r);
1887 ILVR_B4_SH(zero, p1_org, zero, p0_org, zero, q0_org, zero, q1_org,
1893 PCKEV_B2_UB(zero, p0_r, zero, q0_r, p0, q0);
1925 v16i8 zero = { 0 };
1949 is_bs_greater_than0 = (v16u8) (zero < (v16i8) bs);
1972 is_less_than = (v16u8) __msa_ilvr_d((v2i64) zero, (v2i64) is_less_than);
1975 ILVR_B4_SH(zero, p1_org, zero, p0_org, zero, q0_org, zero, q1_org,
1978 negate_tc = zero - (v16i8) tc;
1981 ILVR_B2_SH(sign_negate_tc, negate_tc, zero, tc, negate_tc_r, tc_r);
1986 PCKEV_B2_UB(zero, p0_r, zero, q0_r, p0, q0);
2217 v16i8 zero = { 0 };
2233 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3, src0_r, src1_r,
2235 ILVL_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3, src0_l, src1_l,
2237 ILVR_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7, src4_r, src5_r,
2239 ILVL_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7, src4_l, src5_l,
2272 ILVR_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3, src0_r,
2274 ILVL_B4_SH(zero, src0, zero, src1, zero, src2, zero, src3, src0_l,
2276 ILVR_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7, src4_r,
2278 ILVL_B4_SH(zero, src4, zero, src5, zero, src6, zero, src7, src4_l,