Lines Matching defs:reg1
435 __m128i tmp0, tmp1, tmp2, tmp3, reg0, reg1;
440 reg1 = __lsx_vld(src_top_ptr, 0);
443 DUP4_ARG2(__lsx_vilvl_b, tmp0, reg1, tmp1, reg1, tmp2, reg1, tmp3, reg1,
467 __m128i reg0, reg1;
470 reg1 = __lsx_vld(src_top_ptr, 0);
475 DUP4_ARG2(__lsx_vilvl_b, tmp0, reg1, tmp1, reg1, tmp2, reg1, tmp3, reg1,
477 DUP4_ARG2(__lsx_vilvl_b, tmp4, reg1, tmp5, reg1, tmp6, reg1, tmp7, reg1,
517 __m128i reg0, reg1;
523 reg1 = __lsx_vld(src_top_ptr, 0);
532 DUP4_ARG2(__lsx_vaddwev_h_bu, tmp0, reg1, tmp1, reg1, tmp2, reg1, tmp3,
533 reg1, src0, src1, src2, src3);
534 DUP4_ARG2(__lsx_vaddwod_h_bu, tmp0, reg1, tmp1, reg1, tmp2, reg1, tmp3,
535 reg1, src4, src5, src6, src7);
546 DUP4_ARG2(__lsx_vaddwev_h_bu, tmp4, reg1, tmp5, reg1, tmp6, reg1, tmp7,
547 reg1, src0, src1, src2, src3);
548 DUP4_ARG2(__lsx_vaddwod_h_bu, tmp4, reg1, tmp5, reg1, tmp6, reg1, tmp7,
549 reg1, src4, src5, src6, src7);
560 DUP4_ARG2(__lsx_vaddwev_h_bu, tmp8, reg1, tmp9, reg1, tmp10, reg1, tmp11,
561 reg1, src0, src1, src2, src3);
562 DUP4_ARG2(__lsx_vaddwod_h_bu, tmp8, reg1, tmp9, reg1, tmp10, reg1, tmp11,
563 reg1, src4, src5, src6, src7);
574 DUP4_ARG2(__lsx_vaddwev_h_bu, tmp12, reg1, tmp13, reg1, tmp14, reg1,
575 tmp15, reg1, src0, src1, src2, src3);
576 DUP4_ARG2(__lsx_vaddwod_h_bu, tmp12, reg1, tmp13, reg1, tmp14, reg1,
577 tmp15, reg1, src4, src5, src6, src7);
600 __m128i tmp0, tmp1, tmp2, tmp3, reg0, reg1, reg2;
605 DUP2_ARG2(__lsx_vld, src_top_ptr, 0, src_top_ptr, 16, reg1, reg2);
612 DUP4_ARG2(__lsx_vaddwev_h_bu, tmp0, reg1, tmp1, reg1, tmp2, reg1,
613 tmp3, reg1, src0, src1, src2, src3);
614 DUP4_ARG2(__lsx_vaddwod_h_bu, tmp0, reg1, tmp1, reg1, tmp2, reg1,
615 tmp3, reg1, src4, src5, src6, src7);