Lines Matching refs:mask5
759 __m128i mask0, mask1, mask2, mask3, mask4, mask5, mask6, mask7;
772 DUP2_ARG2(__lsx_vaddi_bu, mask4, 2, mask4, 4, mask5, mask6);
799 DUP2_ARG3(__lsx_vshuf_b, src5, src4, mask5, src7, src6, mask5,
908 __m128i mask1, mask2, mask3, mask4, mask5, mask6, mask7;
919 DUP2_ARG2(__lsx_vaddi_bu, mask0, 10, mask0, 12, mask5, mask6);
935 DUP4_ARG3(__lsx_vshuf_b, src0, src0, mask1, src1, src0, mask5, src1,
937 DUP2_ARG3(__lsx_vshuf_b, src3, src2, mask5, src3, src3, mask1,
978 __m128i mask1, mask2, mask3, mask4, mask5, mask6, mask7;
989 DUP2_ARG2(__lsx_vaddi_bu, mask0, 10, mask0, 12, mask5, mask6);
1004 DUP4_ARG3(__lsx_vshuf_b, src1, src0, mask4, src1, src0, mask5, src1,
1038 __m128i mask1, mask2, mask3, mask4, mask5, mask6, mask7;
1049 DUP2_ARG2(__lsx_vaddi_bu, mask0, 10, mask0, 12, mask5, mask6);
1062 DUP4_ARG3(__lsx_vshuf_b, src0, src0, mask1, src1, src0, mask5, src1,
1063 src1, mask1, src2, src1, mask5, vec0, vec1, vec2, vec3);
1107 __m128i mask1, mask2, mask3, mask4, mask5, mask6, mask7;
1118 DUP2_ARG2(__lsx_vaddi_bu, mask0, 10, mask0, 12, mask5, mask6)
1135 DUP4_ARG3(__lsx_vshuf_b, src1, src0, mask4, src1, src0, mask5, src1,
1151 DUP4_ARG3(__lsx_vshuf_b, src2, src1, mask4, src2, src1, mask5, src2,
1167 DUP4_ARG3(__lsx_vshuf_b, src3, src2, mask4, src3, src2, mask5, src3,
1952 __m128i mask0, mask1, mask2, mask3, mask4, mask5, mask6, mask7;
2076 DUP2_ARG2(__lsx_vaddi_bu, mask4, 2, mask4, 4, mask5, mask6);
2087 DUP4_ARG3(__lsx_vshuf_b, src3, src0, mask4, src3, src0, mask5, src3, src0,
2089 DUP4_ARG3(__lsx_vshuf_b, src4, src1, mask4, src4, src1, mask5, src4, src1,
2091 DUP4_ARG3(__lsx_vshuf_b, src5, src2, mask4, src5, src2, mask5, src5, src2,
2093 DUP4_ARG3(__lsx_vshuf_b, src6, src3, mask4, src6, src3, mask5, src6, src3,
2125 DUP4_ARG3(__lsx_vshuf_b, src9, src7, mask4, src9, src7, mask5, src9,
2127 DUP4_ARG3(__lsx_vshuf_b, src10, src8, mask4, src10, src8, mask5, src10,