Lines Matching refs:mask1
612 __m128i mask1, mask2, mask3;
621 DUP2_ARG2(__lsx_vaddi_bu, mask0, 2, mask0, 4, mask1, mask2);
633 DUP4_ARG3(__lsx_vshuf_b, src1, src0, mask0, src1, src0, mask1, src1,
639 DUP4_ARG3(__lsx_vshuf_b, src3, src2, mask0, src3, src2, mask1, src3,
645 DUP4_ARG3(__lsx_vshuf_b, src5, src4, mask0, src5, src4, mask1, src5,
651 DUP4_ARG3(__lsx_vshuf_b, src7, src6, mask0, src7, src6, mask1, src7,
672 DUP4_ARG3(__lsx_vshuf_b, src1, src0, mask0, src1, src0, mask1, src1,
698 __m128i mask1, mask2, mask3;
707 DUP2_ARG2(__lsx_vaddi_bu, mask0, 2, mask0, 4, mask1, mask2);
716 DUP4_ARG3(__lsx_vshuf_b, src0, src0, mask0, src0, src0, mask1, src0,
722 DUP4_ARG3(__lsx_vshuf_b, src1, src1, mask0, src1, src1, mask1, src1,
728 DUP4_ARG3(__lsx_vshuf_b, src2, src2, mask0, src2, src2, mask1, src2,
734 DUP4_ARG3(__lsx_vshuf_b, src3, src3, mask0, src3, src3, mask1, src3,
759 __m128i mask0, mask1, mask2, mask3, mask4, mask5, mask6, mask7;
769 DUP2_ARG2(__lsx_vaddi_bu, mask0, 2, mask0, 4, mask1, mask2);
795 DUP2_ARG3(__lsx_vshuf_b, src0, src0, mask1, src1, src1, mask1,
797 DUP2_ARG3(__lsx_vshuf_b, src2, src2, mask1, src3, src3, mask1,
848 __m128i mask1, mask2, mask3;
858 DUP2_ARG2(__lsx_vaddi_bu, mask0, 2, mask0, 4, mask1, mask2);
873 DUP2_ARG3(__lsx_vshuf_b, src0, src0, mask1, src1, src1, mask1,
875 DUP2_ARG3(__lsx_vshuf_b, src2, src2, mask1, src3, src3, mask1,
908 __m128i mask1, mask2, mask3, mask4, mask5, mask6, mask7;
917 DUP4_ARG2(__lsx_vaddi_bu, mask0, 2, mask0, 4, mask0, 6, mask0, 8, mask1,
935 DUP4_ARG3(__lsx_vshuf_b, src0, src0, mask1, src1, src0, mask5, src1,
936 src1, mask1, src2, src2, mask1, vec0, vec1, vec2, vec3);
937 DUP2_ARG3(__lsx_vshuf_b, src3, src2, mask5, src3, src3, mask1,
978 __m128i mask1, mask2, mask3, mask4, mask5, mask6, mask7;
988 mask1, mask2, mask3, mask4);
997 DUP4_ARG3(__lsx_vshuf_b, src0, src0, mask0, src0, src0, mask1, src0,
1010 DUP4_ARG3(__lsx_vshuf_b, src1, src1, mask0, src1, src1, mask1, src1, src1,
1016 DUP4_ARG3(__lsx_vshuf_b, src2, src2, mask0, src2, src2, mask1, src2, src2,
1038 __m128i mask1, mask2, mask3, mask4, mask5, mask6, mask7;
1047 DUP4_ARG2(__lsx_vaddi_bu, mask0, 2, mask0, 4, mask0, 6, mask0, 8, mask1,
1062 DUP4_ARG3(__lsx_vshuf_b, src0, src0, mask1, src1, src0, mask5, src1,
1063 src1, mask1, src2, src1, mask5, vec0, vec1, vec2, vec3);
1082 DUP2_ARG3(__lsx_vshuf_b, src2, src2, mask1, src3, src3, mask1,
1107 __m128i mask1, mask2, mask3, mask4, mask5, mask6, mask7;
1116 DUP4_ARG2(__lsx_vaddi_bu, mask0, 2, mask0, 4, mask0, 6, mask0, 8, mask1,
1127 DUP4_ARG3(__lsx_vshuf_b, src0, src0, mask0, src0, src0, mask1, src0,
1143 DUP4_ARG3(__lsx_vshuf_b, src1, src1, mask0, src1, src1, mask1, src1,
1159 DUP4_ARG3(__lsx_vshuf_b, src2, src2, mask0, src2, src2, mask1, src2,
1175 DUP4_ARG3(__lsx_vshuf_b, src3, src3, mask0, src3, src3, mask1, src3,
1183 DUP4_ARG3(__lsx_vshuf_b, src4, src4, mask0, src4, src4, mask1, src4,
1668 __m128i mask1, mask2, mask3;
1688 DUP2_ARG2(__lsx_vaddi_bu, mask0, 2, mask0, 4, mask1, mask2);
1699 DUP4_ARG3(__lsx_vshuf_b, src3, src0, mask0, src3, src0, mask1, src3, src0,
1701 DUP4_ARG3(__lsx_vshuf_b, src4, src1, mask0, src4, src1, mask1, src4, src1,
1703 DUP4_ARG3(__lsx_vshuf_b, src5, src2, mask0, src5, src2, mask1, src5, src2,
1705 DUP4_ARG3(__lsx_vshuf_b, src6, src3, mask0, src6, src3, mask1, src6, src3,
1736 DUP4_ARG3(__lsx_vshuf_b, src9, src7, mask0, src9, src7, mask1, src9, src7,
1738 DUP4_ARG3(__lsx_vshuf_b, src10, src8, mask0, src10, src8, mask1, src10, src8,
1806 __m128i mask1, mask2, mask3;
1826 DUP2_ARG2(__lsx_vaddi_bu, mask0, 2, mask0, 4, mask1, mask2);
1843 DUP4_ARG3(__lsx_vshuf_b, src0, src0, mask0, src0, src0, mask1, src0,
1845 DUP4_ARG3(__lsx_vshuf_b, src1, src1, mask0, src1, src1, mask1, src1,
1847 DUP4_ARG3(__lsx_vshuf_b, src2, src2, mask0, src2, src2, mask1, src2,
1849 DUP4_ARG3(__lsx_vshuf_b, src3, src3, mask0, src3, src3, mask1, src3,
1869 DUP4_ARG3(__lsx_vshuf_b, src4, src4, mask0, src4, src4, mask1, src4,
1871 DUP4_ARG3(__lsx_vshuf_b, src5, src5, mask0, src5, src5, mask1, src5,
1873 DUP4_ARG3(__lsx_vshuf_b, src6, src6, mask0, src6, src6, mask1, src6,
1892 DUP4_ARG3(__lsx_vshuf_b, src7, src7, mask0, src7, src7, mask1, src7,
1952 __m128i mask0, mask1, mask2, mask3, mask4, mask5, mask6, mask7;
1974 DUP2_ARG2(__lsx_vaddi_bu, mask0, 2, mask0, 4, mask1, mask2);
1991 DUP4_ARG3(__lsx_vshuf_b, src0, src0, mask0, src0, src0, mask1, src0, src0,
1993 DUP4_ARG3(__lsx_vshuf_b, src1, src1, mask0, src1, src1, mask1, src1, src1,
1995 DUP4_ARG3(__lsx_vshuf_b, src2, src2, mask0, src2, src2, mask1, src2, src2,
1997 DUP4_ARG3(__lsx_vshuf_b, src3, src3, mask0, src3, src3, mask1, src3, src3,
2017 DUP4_ARG3(__lsx_vshuf_b, src4, src4, mask0, src4, src4, mask1, src4, src4,
2019 DUP4_ARG3(__lsx_vshuf_b, src5, src5, mask0, src5, src5, mask1, src5, src5,
2021 DUP4_ARG3(__lsx_vshuf_b, src6, src6, mask0, src6, src6, mask1, src6, src6,
2040 DUP4_ARG3(__lsx_vshuf_b, src7, src7, mask0, src7, src7, mask1, src7,
2233 __m128i mask1, mask2, mask3;
2240 DUP2_ARG2(__lsx_vaddi_bu, mask0, 2, mask0, 8, mask1, mask2);
2254 DUP2_ARG3(__lsx_vshuf_b, src0, src0, mask1, src1, src0, mask3,
2256 DUP2_ARG3(__lsx_vshuf_b, src1, src1, mask1, src2, src2, mask1,
2545 __m128i mask1;
2560 mask1 = __lsx_vaddi_bu(mask0, 2);
2567 DUP2_ARG3(__lsx_vshuf_b, src0, src0, mask0, src0, src0, mask1, vec0, vec1);
2568 DUP2_ARG3(__lsx_vshuf_b, src1, src1, mask0, src1, src1, mask1, vec2, vec3);
2569 DUP2_ARG3(__lsx_vshuf_b, src2, src2, mask0, src2, src2, mask1, vec4, vec5);
2570 DUP2_ARG3(__lsx_vshuf_b, src3, src3, mask0, src3, src3, mask1, vec6, vec7);
2571 DUP2_ARG3(__lsx_vshuf_b, src4, src4, mask0, src4, src4, mask1, vec8, vec9);
2610 __m128i src0, src1, src2, src3, src4, src5, src6, mask0, mask1;
2626 mask1 = __lsx_vaddi_bu(mask0, 2);
2636 DUP2_ARG3(__lsx_vshuf_b, src0, src0, mask0, src0, src0, mask1,
2638 DUP2_ARG3(__lsx_vshuf_b, src1, src1, mask0, src1, src1, mask1,
2640 DUP2_ARG3(__lsx_vshuf_b, src2, src2, mask0, src2, src2, mask1,
2652 DUP2_ARG3(__lsx_vshuf_b, src3, src3, mask0, src3, src3, mask1,
2654 DUP2_ARG3(__lsx_vshuf_b, src4, src4, mask0, src4, src4, mask1,
2656 DUP2_ARG3(__lsx_vshuf_b, src5, src5, mask0, src5, src5, mask1,
2658 DUP2_ARG3(__lsx_vshuf_b, src6, src6, mask0, src6, src6, mask1,
2712 __m128i mask1, filter_vec;
2730 mask1 = __lsx_vaddi_bu(mask0, 2);
2739 DUP4_ARG3(__lsx_vshuf_b, src0, src0, mask0, src0, src0, mask1, src1, src1,
2740 mask0, src1, src1, mask1, vec0, vec1, vec2, vec3);
2741 DUP4_ARG3(__lsx_vshuf_b, src2, src2, mask0, src2, src2, mask1,src3, src3,
2742 mask0, src3, src3, mask1, vec4, vec5, vec6, vec7);
2743 DUP4_ARG3(__lsx_vshuf_b, src4, src4, mask0, src4, src4, mask1, src5, src5,
2744 mask0, src5, src5, mask1, vec8, vec9, vec10, vec11);
2745 DUP4_ARG3(__lsx_vshuf_b, src6, src6, mask0, src6, src6, mask1, src7, src7,
2746 mask0, src7, src7, mask1, vec12, vec13, vec14, vec15);
2747 DUP2_ARG3(__lsx_vshuf_b, src8, src8, mask0, src8, src8, mask1,
2829 __m128i mask1, filter_vec;
2843 mask1 = __lsx_vaddi_bu(mask0, 2);
2854 DUP2_ARG3(__lsx_vshuf_b, src0, src0, mask0, src0, src0, mask1,
2856 DUP2_ARG3(__lsx_vshuf_b, src1, src1, mask0, src1, src1, mask1,
2858 DUP2_ARG3(__lsx_vshuf_b, src2, src2, mask0, src2, src2, mask1,
2877 DUP2_ARG3(__lsx_vshuf_b, src3, src3, mask0, src3, src3, mask1,
2879 DUP2_ARG3(__lsx_vshuf_b, src4, src4, mask0, src4, src4, mask1,
2881 DUP2_ARG3(__lsx_vshuf_b, src5, src5, mask0, src5, src5, mask1,
2883 DUP2_ARG3(__lsx_vshuf_b, src6, src6, mask0, src6, src6, mask1,
2977 __m128i mask0, mask1, mask2, mask3;
2994 mask1 = __lsx_vaddi_bu(mask0, 2);
3004 DUP2_ARG3(__lsx_vshuf_b, src0, src0, mask0, src0, src0, mask1, vec0, vec1);
3005 DUP2_ARG3(__lsx_vshuf_b, src1, src1, mask0, src1, src1, mask1, vec2, vec3);
3006 DUP2_ARG3(__lsx_vshuf_b, src2, src2, mask0, src2, src2, mask1, vec4, vec5);
3024 DUP2_ARG3(__lsx_vshuf_b, src3, src3, mask0, src3, src3, mask1,
3026 DUP2_ARG3(__lsx_vshuf_b, src4, src4, mask0, src4, src4, mask1,
3028 DUP2_ARG3(__lsx_vshuf_b, src5, src5, mask0, src5, src5, mask1,
3030 DUP2_ARG3(__lsx_vshuf_b, src6, src6, mask0, src6, src6, mask1,