Lines Matching defs:src32_l
1400 __m128i src10_l, src32_l, src54_l, src76_l, src98_l;
1421 src10_l, src32_l, src54_l, src21_l);
1423 DUP2_ARG2(__lsx_vilvl_d, src21_l, src10_l, src43_l, src32_l,
1508 __m128i src10_l, src32_l, src54_l, src76_l, src98_l;
1535 src10_l, src32_l, src54_l, src21_l);
1566 DUP2_ARG3(__lsx_vdp2add_h_bu_b, dst0_l, src32_l, filt1, dst0_l,
1573 dst2_l = __lsx_vdp2_h_bu_b(src32_l, filt0);
1602 src32_l = src76_l;
2280 __m128i src10_l, src32_l, src21_l, src43_l;
2298 DUP2_ARG2(__lsx_vilvh_b, src3, src2, src4, src3, src32_l, src43_l);
2302 src32_l, filt1, dst1_r, src43_r, filt1, dst1_l, src43_l,
2316 DUP4_ARG2(__lsx_vdp2_h_bu_b, src32_r, filt0, src32_l, filt0, src43_r,
2347 __m128i src10_l, src32_l, src21_l, src43_l;
2372 DUP2_ARG2(__lsx_vilvh_b, src3, src2, src4, src3, src32_l, src43_l);
2378 src32_l, filt1, dst1_r, src43_r, filt1, dst1_l, src43_l,
2403 DUP4_ARG2(__lsx_vdp2_h_bu_b, src32_r, filt0, src32_l, filt0, src43_r,
2441 __m128i src10_l, src32_l, src76_l, src98_l;
2468 DUP2_ARG2(__lsx_vilvh_b, src3, src2, src4, src3, src32_l, src43_l);
2476 src32_l, filt1, dst1_r, src43_r, filt1, dst1_l,src43_l,
2505 DUP4_ARG2(__lsx_vdp2_h_bu_b, src32_r, filt0, src32_l, filt0, src43_r,