Lines Matching refs:tmp1
63 __m128i tmp0, tmp1, tmp2, tmp3;
73 DUP2_ARG2(__lsx_vilvl_w, reg1, reg0, reg3, reg2, tmp0, tmp1);
74 src0 = __lsx_vilvl_d(tmp1, tmp0);
79 DUP2_ARG2(__lsx_vilvl_w, reg1, reg0, reg3, reg2, tmp0, tmp1);
80 src1 = __lsx_vilvl_d(tmp1, tmp0);
84 tmp1 = __lsx_vldrepl_d(src1_ptr + src2_stride, 0);
88 DUP2_ARG2(__lsx_vilvl_d, tmp1, tmp0, tmp3, tmp2, in0, in1);
90 tmp1 = __lsx_vldrepl_d(src1_ptr + src2_stride, 0);
94 DUP2_ARG2(__lsx_vilvl_d, tmp1, tmp0, tmp3, tmp2, in2, in3);
540 __m128i src0, src1, tmp0, tmp1;
580 tmp1 = __lsx_vssrarni_bu_h(dst2, dst2, 7);
583 __lsx_vstelm_d(tmp1, dst, 16, 0);
1506 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8;
1535 DUP2_ARG2(__lsx_vilvh_h, dsth1, dsth0, dsth2, dsth1, tmp1, tmp3);
1576 DUP2_ARG2(__lsx_vpickev_d, tmp3, tmp1, tmp7, tmp5, tmp0, tmp8);
1581 DUP2_ARG2(__lsx_vilvh_h, dsth7, dsth6, dsth8, dsth7, tmp1, tmp3);
1589 DUP2_ARG2(__lsx_vpickev_d, dsth3, dsth1, tmp3, tmp1, tmp0, tmp1);
1593 dst3_l = __lsx_vdp2_w_h(tmp1, filt_h0);
1594 DUP2_ARG3(__lsx_vdp2add_w_h, dst1_l, tmp0, filt_h1, dst2_l, tmp1, filt_h1,
1604 DUP2_ARG2(__lsx_vpickev_h, dst1_r, dst0_r, dst3_r, dst2_r, tmp0, tmp1);
1622 DUP4_ARG2(__lsx_vsadd_h, dsth0, tmp0, dsth1, tmp1, dsth2, tmp2, dsth3,
1623 tmp3, tmp0, tmp1, tmp2, tmp3);
1624 DUP4_ARG2(__lsx_vmaxi_h, tmp0, 0, tmp1, 0, tmp2, 0, tmp3, 0,
1625 tmp0, tmp1, tmp2, tmp3);
1626 DUP2_ARG3(__lsx_vssrlrni_bu_h, tmp1, tmp0, 7, tmp3, tmp2, 7, out0, out1);
1645 DUP2_ARG2(__lsx_vilvl_w, reg1, reg0, reg3, reg2, tmp0, tmp1);
1646 dsth4 = __lsx_vilvl_d(tmp1, tmp0);
1653 DUP2_ARG2(__lsx_vilvl_w, reg1, reg0, reg3, reg2, tmp0, tmp1);
1654 dsth5 = __lsx_vilvl_d(tmp1, tmp0);
1690 __m128i tmp0, tmp1;
1733 DUP2_ARG2(__lsx_vpickev_h, dst0_l, dst0_r, dst1_l, dst1_r, tmp0, tmp1);
1734 DUP2_ARG2(__lsx_vsadd_h, in0, tmp0, in1, tmp1, tmp0, tmp1);
1735 DUP2_ARG2(__lsx_vmaxi_h, tmp0, 0, tmp1, 0, tmp0, tmp1);
1736 out = __lsx_vssrlrni_bu_h(tmp1, tmp0, 7);
1762 __m128i dst0, dst1, dst2, dst3, dst4, dst5, dst6, tmp0, tmp1, tmp2, tmp3;
1846 dst2_r, dst3_l, dst3_r, tmp0, tmp1, tmp2, tmp3);
1847 DUP4_ARG2(__lsx_vsadd_h, in0, tmp0, in1, tmp1, in2, tmp2, in3, tmp3,
1848 tmp0, tmp1, tmp2, tmp3);
1849 DUP4_ARG2(__lsx_vmaxi_h, tmp0, 0, tmp1, 0, tmp2, 0, tmp3, 0,
1850 tmp0, tmp1, tmp2, tmp3);
1851 DUP2_ARG3(__lsx_vssrlrni_bu_h, tmp1, tmp0, 7, tmp3, tmp2, 7, out0, out1);
1884 __m128i tmp0, tmp1, tmp2, tmp3, tmp4, tmp5;
1973 dst3_l, dst3_r, tmp0, tmp1, tmp2, tmp3);
1975 DUP4_ARG2(__lsx_vsadd_h, in0, tmp0, in1, tmp1, in2, tmp2, in3, tmp3,
1976 tmp0, tmp1, tmp2, tmp3);
1978 DUP4_ARG2(__lsx_vmaxi_h, tmp0, 0, tmp1, 0, tmp2, 0, tmp3, 0,
1979 tmp0, tmp1, tmp2, tmp3);
1981 DUP2_ARG3(__lsx_vssrlrni_bu_h, tmp1, tmp0, 7, tmp3, tmp2, 7, out0, out1);
2022 __m128i tmp0, tmp1, tmp2, tmp3;
2108 dst2_r, dst3_l, dst3_r, tmp0, tmp1, tmp2, tmp3);
2109 DUP4_ARG2(__lsx_vsadd_h, in0, tmp0, in1, tmp1, in2, tmp2, in3, tmp3,
2110 tmp0, tmp1, tmp2, tmp3);
2111 DUP4_ARG2(__lsx_vmaxi_h, tmp0, 0, tmp1, 0, tmp2, 0, tmp3, 0, tmp0,
2112 tmp1, tmp2, tmp3);
2113 DUP2_ARG3(__lsx_vssrlrni_bu_h, tmp1, tmp0, 7, tmp3, tmp2, 7, out0, out1);