Lines Matching refs:src5
636 __m128i src0, src1, src2, src3, src4, src5;
656 src5, src6);
658 DUP4_ARG2(__lsx_vilvl_b, src1, src0, src3, src2, src5, src4, src2, src1,
660 DUP2_ARG2(__lsx_vilvl_b, src4, src3, src6, src5, src43_r, src65_r);
723 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8;
750 src_stride_2x, src5, src6);
753 DUP4_ARG2(__lsx_vilvl_b, src1, src0, src3, src2, src5, src4, src2, src1,
755 DUP2_ARG2(__lsx_vilvl_b, src4, src3, src6, src5, src43_r, src65_r);
756 DUP4_ARG2(__lsx_vilvh_b, src1, src0, src3, src2, src5, src4, src2, src1,
758 DUP2_ARG2(__lsx_vilvh_b, src4, src3, src6, src5, src43_l, src65_l);
874 __m128i src0, src1, src2, src3, src4, src5, src6, src7;
912 src_stride_2x, src5, src6);
935 DUP4_ARG3(__lsx_vshuf_b, src5, src5, mask0, src5, src5, mask1, src5,
936 src5, mask2, src5, src5, mask3, vec4, vec5, vec6, vec7);
1072 __m128i src0, src1, src2, src3, src4, src5, src6, src7;
1094 DUP2_ARG2(__lsx_vld, src0_ptr, 0, src0_ptr, 16, src4, src5);
1117 DUP4_ARG3(__lsx_vshuf_b, src4, src4, mask0, src5, src4, mask2, src6,
1121 DUP4_ARG3(__lsx_vshuf_b, src4, src4, mask1, src5, src4, mask3, src6,
1142 DUP4_ARG3(__lsx_vshuf_b, src1, src1, mask0, src3, src3, mask0, src5,
1143 src5, mask0, src7, src7, mask0, vec0, vec1, vec2, vec3);
1146 DUP4_ARG3(__lsx_vshuf_b, src1, src1, mask1, src3, src3, mask1, src5,
1147 src5, mask1, src7, src7, mask1, vec0, vec1, vec2, vec3);
1220 __m128i src0, src1, src2, src3, src4, src5, src6;
1242 src4, src5);
1260 DUP2_ARG2(__lsx_vilvl_b, src5, src4, src6, src5, src54_r, src65_r);
1261 DUP2_ARG2(__lsx_vilvh_b, src5, src4, src6, src5, src54_l, src65_l);
1302 __m128i src0, src1, src2, src3, src4, src5;
1342 src5 = __lsx_vld(src0_ptr, 0);
1349 DUP2_ARG2(__lsx_vilvl_b, src5, src4, src2, src5, src10_r, src21_r);
1350 DUP2_ARG2(__lsx_vilvh_b, src5, src4, src2, src5, src10_l, src21_l);
1372 __m128i src0, src1, src2, src3, src4, src5;
1436 32, src5, in0, in2, in4);
1444 DUP2_ARG2(__lsx_vilvl_b, src5, src4, src2, src5, src10_r, src21_r);
1445 DUP2_ARG2(__lsx_vilvh_b, src5, src4, src2, src5, src10_l, src21_l);
1499 __m128i src0, src1, src2, src3, src4, src5, src6;
1539 src4, src5);
1544 DUP2_ARG3(__lsx_vshuf_b, src5, src5, mask0, src5, src5, mask1, vec4, vec5);
1554 src4, src5);
1559 DUP2_ARG3(__lsx_vshuf_b, src5, src5, mask0, src5, src5, mask1, vec4, vec5);
1759 __m128i src0, src1, src2, src3, src4, src5, src6, mask0, mask1;
1786 src5, src6);
1815 DUP2_ARG3(__lsx_vshuf_b, src5, src5, mask0, src5, src5, mask1,
1876 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8;
1910 src5, src6, src7, src8);
1925 DUP2_ARG3(__lsx_vshuf_b, src5, src5, mask0, src5, src5, mask1, vec10, vec11);
2013 __m128i src0, src1, src2, src3, src4, src5, src6;
2067 src_stride_2x, src4, src5);
2078 DUP4_ARG3(__lsx_vshuf_b, src5, src5, mask0, src5, src5, mask1, src6,