Lines Matching refs:reg3
64 __m128i reg0, reg1, reg2, reg3;
71 reg3 = __lsx_vldrepl_w(src0_ptr + src_stride_3x, 0);
73 DUP2_ARG2(__lsx_vilvl_w, reg1, reg0, reg3, reg2, tmp0, tmp1);
78 reg3 = __lsx_vldrepl_w(src0_ptr + src_stride_3x, 0);
79 DUP2_ARG2(__lsx_vilvl_w, reg1, reg0, reg3, reg2, tmp0, tmp1);
115 reg3 = __lsx_vldrepl_d(src1_ptr + src2_stride, 0);
117 in0 = __lsx_vilvl_d(reg3, reg2);
150 __m128i reg0, reg1, reg2, reg3;
156 reg3 = __lsx_vldrepl_d(src0_ptr + src_stride_3x, 0);
157 DUP2_ARG2(__lsx_vilvl_d, reg1, reg0, reg3, reg2, src0, src1);
162 reg3 = __lsx_vldrepl_d(src0_ptr + src_stride_3x, 0);
163 DUP2_ARG2(__lsx_vilvl_d, reg1, reg0, reg3, reg2, src2, src3);
246 __m128i reg0, reg1, reg2, reg3;
252 reg3 = __lsx_vldrepl_d(src0_ptr + src_stride_3x, 0);
253 DUP2_ARG2(__lsx_vilvl_d, reg1, reg0, reg3, reg2, src0, src1);
258 reg3 = __lsx_vldrepl_d(src0_ptr + src_stride_3x, 0);
259 DUP2_ARG2(__lsx_vilvl_d, reg1, reg0, reg3, reg2, src2, src3);
1507 __m128i reg0, reg1, reg2, reg3;
1644 reg3 = __lsx_vldrepl_w(src1_ptr + src2_stride_3x, 8);
1645 DUP2_ARG2(__lsx_vilvl_w, reg1, reg0, reg3, reg2, tmp0, tmp1);
1652 reg3 = __lsx_vldrepl_w(src1_ptr + src2_stride_3x, 8);
1653 DUP2_ARG2(__lsx_vilvl_w, reg1, reg0, reg3, reg2, tmp0, tmp1);