Lines Matching refs:src11
1192 __m128i src10, src11, src12, src13, dst0, dst1, dst2, dst3;
1213 src_stride_2x, src11, src12);
1215 DUP4_ARG3(__lsx_vshuf_b, src10, src_minus10, shuf1, src11,
1219 DUP4_ARG3(__lsx_vshuf_b, src10, src_minus10, shuf2, src11,
1290 src_minus11 = src11;
1318 __m128i src_minus10, src_minus11, src10, src11;
1327 src + src_stride_2x, 0, src_minus10, src_minus11, src10, src11);
1332 src11, src_minus11, src10, src10, src_minus10, src_zero0,
1358 src_minus11 = src11;
1362 src10, src11);
1370 src11, src_minus11, src10, src10, src_minus10, src_zero0,
1413 __m128i src_minus10, src_minus11, src10, src11;
1420 DUP2_ARG2(__lsx_vldx, src, src_stride, src, src_stride_2x, src10, src11);
1425 src11, src_minus11, src10, src10, src_minus10, src_zero0,
1451 src_minus11 = src11;
1455 src10, src11);
1463 src11, src_minus11, src10, src10, src_minus10, src_zero0,
1516 __m128i src10, src_minus10, dst0, src11, src_minus11, dst1;
1533 src10, src11, src12, src13);
1535 src10, src10, src_minus11, src10, src11, cmp_minus10,
1537 DUP4_ARG2(__lsx_vseq_b, src11, src10, src11, src12, src12, src11,
1549 src10, src10, src_minus11, src10, src11, cmp_minus10,
1551 DUP4_ARG2(__lsx_vsle_bu, src11, src10, src11, src12, src12, src11,
1592 DUP4_ARG2(__lsx_vxori_b, src_minus11, 128, src10, 128, src11, 128,
1593 src12, 128, src_minus11, src10, src11, src12);
1595 offset_mask1, src11, offset_mask2, src12,
1627 __m128i src_minus11, src10, src11;
1639 src10, src11);
1646 DUP2_ARG3(__lsx_vshuf_b, zeros, src10, shuf2, zeros, src11, shuf2,
1677 src_minus11 = src11;
1681 src10, src11);
1690 DUP2_ARG3(__lsx_vshuf_b, zeros, src10, shuf2, zeros, src11, shuf2,
1740 __m128i src_minus10, src10, src_minus11, src11;
1752 src10, src11);
1759 DUP2_ARG3(__lsx_vshuf_b, zeros, src10, shuf2, zeros, src11, shuf2,
1790 src_minus11 = src11;
1794 src10, src11)
1802 DUP2_ARG3(__lsx_vshuf_b, zeros, src10, shuf2, zeros, src11, shuf2,
1833 src_minus11 = src11;
1837 src10, src11);
1871 __m128i src10, src_minus10, dst0, src11, src_minus11, dst1;
1892 src_stride_2x, src11, src12);
1896 DUP4_ARG3(__lsx_vshuf_b, src10, src_minus11, shuf1, src11,
1900 DUP2_ARG3(__lsx_vshuf_b, src11, src_minus12, shuf2, src12,
1976 src_minus12 = src11;
2009 __m128i src_minus10, src10, src_minus11, src11;
2020 src10, src11);
2030 DUP2_ARG2(__lsx_vilvl_b, src10, src_minus10, src11, src_minus11,
2058 src_minus11 = src11;
2062 src10, src11);
2074 DUP2_ARG2(__lsx_vilvl_b, src10, src_minus10, src11, src_minus11,
2123 __m128i src_minus10, src10, src_minus11, src11;
2135 src10, src11);
2145 DUP2_ARG2(__lsx_vilvl_b, src10, src_minus10, src11, src_minus11,
2173 src_minus11 = src11;
2177 src10, src11);
2189 DUP2_ARG2(__lsx_vilvl_b, src10, src_minus10, src11, src_minus11,
2245 __m128i diff_plus13, src10, src11, src12, src13, src_minus10, src_minus11;
2268 src11, src12);
2271 DUP4_ARG3(__lsx_vshuf_b, src10, src_minus11, shuf1, src11,
2276 DUP2_ARG3(__lsx_vshuf_b, src11, src_plus10, shuf2, src12,
2349 src_plus10 = src11;