Lines Matching refs:src10
1192 __m128i src10, src11, src12, src13, dst0, dst1, dst2, dst3;
1211 src10 = __lsx_vld(src_minus1, 0);
1215 DUP4_ARG3(__lsx_vshuf_b, src10, src_minus10, shuf1, src11,
1219 DUP4_ARG3(__lsx_vshuf_b, src10, src_minus10, shuf2, src11,
1289 src_minus10 = src10;
1318 __m128i src_minus10, src_minus11, src10, src11;
1327 src + src_stride_2x, 0, src_minus10, src_minus11, src10, src11);
1331 DUP4_ARG2(__lsx_vilvl_b, src10, src_minus10, src_minus11, src_minus11,
1332 src11, src_minus11, src10, src10, src_minus10, src_zero0,
1357 src_minus10 = src10;
1362 src10, src11);
1369 DUP4_ARG2(__lsx_vilvl_b, src10, src_minus10, src_minus11, src_minus11,
1370 src11, src_minus11, src10, src10, src_minus10, src_zero0,
1413 __m128i src_minus10, src_minus11, src10, src11;
1420 DUP2_ARG2(__lsx_vldx, src, src_stride, src, src_stride_2x, src10, src11);
1424 DUP4_ARG2(__lsx_vilvl_b, src10, src_minus10, src_minus11, src_minus11,
1425 src11, src_minus11, src10, src10, src_minus10, src_zero0,
1450 src_minus10 = src10;
1455 src10, src11);
1462 DUP4_ARG2(__lsx_vilvl_b, src10, src_minus10, src_minus11, src_minus11,
1463 src11, src_minus11, src10, src10, src_minus10, src_zero0,
1516 __m128i src10, src_minus10, dst0, src11, src_minus11, dst1;
1533 src10, src11, src12, src13);
1535 src10, src10, src_minus11, src10, src11, cmp_minus10,
1537 DUP4_ARG2(__lsx_vseq_b, src11, src10, src11, src12, src12, src11,
1549 src10, src10, src_minus11, src10, src11, cmp_minus10,
1551 DUP4_ARG2(__lsx_vsle_bu, src11, src10, src11, src12, src12, src11,
1592 DUP4_ARG2(__lsx_vxori_b, src_minus11, 128, src10, 128, src11, 128,
1593 src12, 128, src_minus11, src10, src11, src12);
1594 DUP4_ARG2(__lsx_vsadd_b, src_minus11, offset_mask0, src10,
1627 __m128i src_minus11, src10, src11;
1639 src10, src11);
1644 DUP2_ARG3(__lsx_vshuf_b, zeros, src_minus11, shuf1, zeros, src10,
1646 DUP2_ARG3(__lsx_vshuf_b, zeros, src10, shuf2, zeros, src11, shuf2,
1676 src_minus10 = src10;
1681 src10, src11);
1688 DUP2_ARG3(__lsx_vshuf_b, zeros, src_minus11, shuf1, zeros, src10, shuf1,
1690 DUP2_ARG3(__lsx_vshuf_b, zeros, src10, shuf2, zeros, src11, shuf2,
1740 __m128i src_minus10, src10, src_minus11, src11;
1752 src10, src11);
1757 DUP2_ARG3(__lsx_vshuf_b, zeros, src_minus11, shuf1, zeros, src10,
1759 DUP2_ARG3(__lsx_vshuf_b, zeros, src10, shuf2, zeros, src11, shuf2,
1789 src_minus10 = src10;
1794 src10, src11)
1800 DUP2_ARG3(__lsx_vshuf_b, zeros, src_minus11, shuf1, zeros, src10, shuf1,
1802 DUP2_ARG3(__lsx_vshuf_b, zeros, src10, shuf2, zeros, src11, shuf2,
1832 src_minus10 = src10;
1837 src10, src11);
1871 __m128i src10, src_minus10, dst0, src11, src_minus11, dst1;
1890 src10 = __lsx_vld(src_orig, 0);
1896 DUP4_ARG3(__lsx_vshuf_b, src10, src_minus11, shuf1, src11,
1975 src_minus11 = src10;
2009 __m128i src_minus10, src10, src_minus11, src11;
2020 src10, src11);
2025 DUP2_ARG3(__lsx_vshuf_b, zeros, src_minus11, shuf1, zeros, src10,
2030 DUP2_ARG2(__lsx_vilvl_b, src10, src_minus10, src11, src_minus11,
2057 src_minus10 = src10;
2062 src10, src11);
2069 DUP2_ARG3(__lsx_vshuf_b, zeros, src_minus11, shuf1, zeros, src10, shuf1,
2074 DUP2_ARG2(__lsx_vilvl_b, src10, src_minus10, src11, src_minus11,
2123 __m128i src_minus10, src10, src_minus11, src11;
2135 src10, src11);
2140 DUP2_ARG3(__lsx_vshuf_b, zeros, src_minus11, shuf1, zeros, src10,
2145 DUP2_ARG2(__lsx_vilvl_b, src10, src_minus10, src11, src_minus11,
2172 src_minus10 = src10;
2177 src10, src11);
2184 DUP2_ARG3(__lsx_vshuf_b, zeros, src_minus11, shuf1, zeros, src10, shuf1,
2189 DUP2_ARG2(__lsx_vilvl_b, src10, src_minus10, src11, src_minus11,
2245 __m128i diff_plus13, src10, src11, src12, src13, src_minus10, src_minus11;
2266 src10 = __lsx_vld(src_orig, 0);
2271 DUP4_ARG3(__lsx_vshuf_b, src10, src_minus11, shuf1, src11,
2275 src_minus11 = __lsx_vshuf_b(src10, src_minus11, shuf2);
2348 src_minus11 = src10;