Lines Matching defs:src3_r
103 __m128i src0_r, src1_r, src2_r, src3_r; \
112 src0_r, src1_r, src2_r, src3_r); \
130 src3_r, filter3, src3_l, filter3, temp2_r, temp2_l, \
143 src3_r, filter2, src3_l, filter2, temp4_r, temp4_l, \
169 src3_r, filter3, src3_l, filter3, temp2_r, temp2_l, \
182 src3_r, filter2, src3_l, filter2, temp4_r, temp4_l, \
195 #define HEVC_IDCT16x16_COL(src0_r, src1_r, src2_r, src3_r, \
246 DUP2_ARG2(__lsx_vdp2_w_h, src3_r, filter1, src3_l, filter1, \
396 __m128i src0_r, src1_r, src2_r, src3_r, src4_r, src5_r, src6_r, src7_r;
410 src0_r, src1_r, src2_r, src3_r);
418 HEVC_IDCT16x16_COL(src0_r, src1_r, src2_r, src3_r, src4_r, src5_r,
445 src0_r, src1_r, src2_r, src3_r);
452 HEVC_IDCT16x16_COL(src0_r, src1_r, src2_r, src3_r, src4_r, src5_r,
545 __m128i src0_r, src1_r, src2_r, src3_r, src4_r, src5_r, src6_r, src7_r;
563 src0_r, src1_r, src2_r, src3_r);
608 src3_r, filter1, src3_l, filter1, sum0_r, sum0_l, tmp1_r, tmp1_l);
621 src3_r, filter1, src3_l, filter1, sum0_r, sum0_l, tmp1_r, tmp1_l);
641 src0_r, src1_r, src2_r, src3_r);
658 sum0_r = __lsx_vdp2add_w_h(sum0_r, src3_r, filter3);
689 src0_r, src1_r, src2_r, src3_r);
719 sum0_r = __lsx_vdp2add_w_h(sum0_r, src3_r, filter3);