Lines Matching defs:src2_r
103 __m128i src0_r, src1_r, src2_r, src3_r; \
112 src0_r, src1_r, src2_r, src3_r); \
129 DUP4_ARG2(__lsx_vdp2_w_h, src2_r, filter2, src2_l, filter2, \
142 DUP4_ARG2(__lsx_vdp2_w_h, src2_r, filter3, src2_l, filter3, \
168 DUP4_ARG2(__lsx_vdp2_w_h, src2_r, filter2, src2_l, filter2, \
181 DUP4_ARG2(__lsx_vdp2_w_h, src2_r, filter3, src2_l, filter3, \
195 #define HEVC_IDCT16x16_COL(src0_r, src1_r, src2_r, src3_r, \
232 DUP2_ARG2(__lsx_vdp2_w_h, src2_r, filter0, src2_l, filter0, \
396 __m128i src0_r, src1_r, src2_r, src3_r, src4_r, src5_r, src6_r, src7_r;
410 src0_r, src1_r, src2_r, src3_r);
418 HEVC_IDCT16x16_COL(src0_r, src1_r, src2_r, src3_r, src4_r, src5_r,
445 src0_r, src1_r, src2_r, src3_r);
452 HEVC_IDCT16x16_COL(src0_r, src1_r, src2_r, src3_r, src4_r, src5_r,
545 __m128i src0_r, src1_r, src2_r, src3_r, src4_r, src5_r, src6_r, src7_r;
563 src0_r, src1_r, src2_r, src3_r);
607 DUP4_ARG2(__lsx_vdp2_w_h, src2_r, filter0, src2_l, filter0,
620 DUP4_ARG2(__lsx_vdp2_w_h, src2_r, filter0, src2_l, filter0,
641 src0_r, src1_r, src2_r, src3_r);
656 sum0_r = __lsx_vdp2add_w_h(sum0_r, src2_r, filter2);
689 src0_r, src1_r, src2_r, src3_r);
717 sum0_r = __lsx_vdp2add_w_h(sum0_r, src2_r, filter2);