Lines Matching defs:src1_r
103 __m128i src0_r, src1_r, src2_r, src3_r; \
112 src0_r, src1_r, src2_r, src3_r); \
119 src1_r, filter1, src1_l, filter1, temp0_r, temp0_l, \
158 src1_r, filter1, src1_l, filter1, temp0_r, temp0_l, \
195 #define HEVC_IDCT16x16_COL(src0_r, src1_r, src2_r, src3_r, \
220 DUP4_ARG3(__lsx_vdp2add_w_h, sum0_r, src1_r, filter1, sum0_l, \
396 __m128i src0_r, src1_r, src2_r, src3_r, src4_r, src5_r, src6_r, src7_r;
410 src0_r, src1_r, src2_r, src3_r);
418 HEVC_IDCT16x16_COL(src0_r, src1_r, src2_r, src3_r, src4_r, src5_r,
445 src0_r, src1_r, src2_r, src3_r);
452 HEVC_IDCT16x16_COL(src0_r, src1_r, src2_r, src3_r, src4_r, src5_r,
545 __m128i src0_r, src1_r, src2_r, src3_r, src4_r, src5_r, src6_r, src7_r;
563 src0_r, src1_r, src2_r, src3_r);
571 sum0_r = __lsx_vdp2add_w_h(sum0_r, src1_r, filter1);
580 sum0_r = __lsx_vdp2add_w_h(sum0_r, src1_r, filter1);
589 sum0_r = __lsx_vdp2add_w_h(sum0_r, src1_r, filter1);
598 sum0_r = __lsx_vdp2add_w_h(sum0_r, src1_r, filter1);
641 src0_r, src1_r, src2_r, src3_r);
654 sum0_r = __lsx_vdp2add_w_h(sum0_r, src1_r, filter1);
689 src0_r, src1_r, src2_r, src3_r);
715 sum0_r = __lsx_vdp2add_w_h(sum0_r, src1_r, filter1);