Lines Matching defs:src0_r
103 __m128i src0_r, src1_r, src2_r, src3_r; \
112 src0_r, src1_r, src2_r, src3_r); \
118 DUP4_ARG2(__lsx_vdp2_w_h, src0_r, filter0, src0_l, filter0, \
157 DUP4_ARG2(__lsx_vdp2_w_h, src0_r, filter0, src0_l, filter0, \
195 #define HEVC_IDCT16x16_COL(src0_r, src1_r, src2_r, src3_r, \
215 DUP4_ARG2(__lsx_vdp2_w_h, src0_r, filter0, src0_l, filter0, \
396 __m128i src0_r, src1_r, src2_r, src3_r, src4_r, src5_r, src6_r, src7_r;
410 src0_r, src1_r, src2_r, src3_r);
418 HEVC_IDCT16x16_COL(src0_r, src1_r, src2_r, src3_r, src4_r, src5_r,
445 src0_r, src1_r, src2_r, src3_r);
452 HEVC_IDCT16x16_COL(src0_r, src1_r, src2_r, src3_r, src4_r, src5_r,
545 __m128i src0_r, src1_r, src2_r, src3_r, src4_r, src5_r, src6_r, src7_r;
563 src0_r, src1_r, src2_r, src3_r);
569 sum0_r = __lsx_vdp2_w_h(src0_r, filter0);
578 sum0_r = __lsx_vdp2_w_h(src0_r, filter0);
587 sum0_r = __lsx_vdp2_w_h(src0_r, filter0);
596 sum0_r = __lsx_vdp2_w_h(src0_r, filter0);
641 src0_r, src1_r, src2_r, src3_r);
652 sum0_r = __lsx_vdp2_w_h(src0_r, filter0);
689 src0_r, src1_r, src2_r, src3_r);
713 sum0_r = __lsx_vdp2_w_h(src0_r, filter0);