Lines Matching refs:v17
40 ld2 {v16.2s,v17.2s}, [x7], x12 // d16=x,n1 d17=x,n0
42 rev64 v17.2s, v17.2s
44 fmul v6.2s, v17.2s, v2.2s
50 fmul v5.2s, v17.2s, v3.2s
58 ld2 {v16.2s,v17.2s}, [x7], x12
60 rev64 v17.2s, v17.2s
62 fmul v6.2s, v17.2s, v2.2s
92 ld2 {v16.2s,v17.2s},[x1], x7 // d16=c1,c0 d18=s1,s0
95 fmul v7.2s, v0.2s, v17.2s
97 fmul v4.2s, v1.2s, v17.2s
111 ld2 {v16.2s,v17.2s},[x1], x7 // d16=c1,c0 d18=s1,s0
196 ld2 {v16.2s,v17.2s}, [x9], x12 // in0u0,in0u1 in4d1,in4d0
199 rev64 v17.2s, v17.2s // in4d0,in4d1 in3d0,in3d1
202 fsub v0.2s, v17.2s, v0.2s // in4d-in4u I
229 ld2 {v16.2s,v17.2s}, [x9], x12 // in0u0,in0u1 in4d1,in4d0
233 rev64 v17.2s, v17.2s // in4d0,in4d1 in3d0,in3d1
236 fsub v0.2s, v17.2s, v0.2s // in4d-in4u I
293 ld2 {v16.2s,v17.2s}, [x1], x7 // c1,c0 s1,s0
296 fmul v7.2s, v0.2s, v17.2s // r1*s1,r0*s0
298 fmul v4.2s, v1.2s, v17.2s // i1*s1,i0*s0
314 ld2 {v16.2s,v17.2s}, [x1], x7 // c1,c0 s1,s0