Lines Matching defs:base
125 u_long base; /**< i/o base address */
198 #define inb_data(fd) sanei_inb(port[fd].base)
199 #define inb_stat(fd) sanei_inb(port[fd].base + 1)
200 #define inb_ctrl(fd) sanei_inb(port[fd].base + 2)
201 #define inb_eppdata(fd) sanei_inb(port[fd].base + 4)
203 #define outb_data(fd,val) sanei_outb(port[fd].base, val)
204 #define outb_stat(fd,val) sanei_outb(port[fd].base + 1, val)
205 #define outb_ctrl(fd,val) sanei_outb(port[fd].base + 2, val)
206 #define outb_addr(fd,val) sanei_outb(port[fd].base + 3, val)
207 #define outb_eppdata(fd,val) sanei_outb(port[fd].base + 4, val)
214 #define inbyte400(fd) sanei_inb(port[fd].base + 0x400)
215 #define inbyte402(fd) sanei_inb(port[fd].base + 0x402)
216 #define outbyte400(fd,val) sanei_outb(port[fd].base + 0x400, val)
217 #define outbyte402(fd,val) sanei_outb(port[fd].base + 0x402, val)
326 DBG( 4, "pp_probe: port 0x%04lx\n", port[fd].base );
410 if( port[fd].base & 0x007 ) {
717 u_long base;
730 base = strtol( dev, &end, 0 );
740 DBG( 6, "pp_open: read port number 0x%03lx\n", base );
741 if( base == 0 ) {
743 DBG( 1, "pp_open: 0x%03lx is not a valid base address\n", base );
767 if( port[i].base == base )
773 DBG( 1, "pp_open: 0x%03lx is not a valid base address\n", base );
787 DBG( 1, "pp_open: port 0x%03lx is already in use\n", base );
814 if( sanei_ioperm( port[i].base, 5, 1 )) {
816 port[i].base);
851 DBG( 6, "pp_close: this is port 0x%03lx\n", port[fd].base );
867 if( sanei_ioperm( port[fd].base, 5, 0 )) {
873 DBG( 1, "pp_close: can't free port 0x%03lx\n", port[fd].base );
944 DBG( 6, "sanei_pp_close: port is 0x%03lx\n", port[fd].base );