Lines Matching defs:pplist
175 static struct parport_list pplist;
284 result = ieee1284_find_ports (&pplist, 0);
295 DBG (3, "pa4s2_init: %d ports reported by IEEE 1284 library\n", pplist.portc);
297 for (n=0; n<pplist.portc; n++)
298 DBG (6, "pa4s2_init: port %d is `%s`\n", n, pplist.portv[n]->name);
302 if ((port = calloc(pplist.portc, sizeof(PortRec))) == NULL)
305 ieee1284_free_ports(&pplist);
403 for (n = 0; n < pplist.portc; n++)
404 if (!strcmp(pplist.portv[n]->name, dev))
407 if (pplist.portc <= n)
468 result = ieee1284_open (pplist.portv[n], 0, &port[n].caps);
517 #define inbyte0(fd) ieee1284_read_data(pplist.portv[fd]);
518 #define inbyte1(fd) (ieee1284_read_status(pplist.portv[fd]) ^ S1284_INVERTED)
519 #define inbyte2(fd) (ieee1284_read_control(pplist.portv[fd]) ^ C1284_INVERTED)
523 ieee1284_epp_read_data(pplist.portv[fd], 0, &val, 1);
527 #define outbyte0(fd,val) ieee1284_write_data(pplist.portv[fd], val)
528 #define outbyte1(fd,val) /* ieee1284_write_status(pplist.portv[fd], (val) ^ S1284_INVERTED) */
529 #define outbyte2(fd,val) ieee1284_write_control(pplist.portv[fd], (val) ^ C1284_INVERTED)
533 ieee1284_epp_write_addr (pplist.portv[fd], 0, (char *)&val, 1);
557 (int) reg, pplist.portv[fd]->name);
579 (int) val, pplist.portv[fd]->name);
607 (int) reg, pplist.portv[fd]->name);
635 (int) val, pplist.portv[fd]->name);
658 (int) reg, pplist.portv[fd]->name);
690 (int) val, pplist.portv[fd]->name);
717 " in reg %u to '%s'\n", (int) val, (int) reg, pplist.portv[fd]->name);
746 result = ieee1284_claim (pplist.portv[fd]);
812 ieee1284_release (pplist.portv[fd]);
830 DBG (6, "pa4s2_close: this is port '%s'\n", pplist.portv[fd]->name);
847 if ((result = ieee1284_close(pplist.portv[fd])) < 0)
855 pplist.portv[fd]->name, pa4s2_libieee1284_errorstr(result));
900 if ((devices = calloc((pplist.portc + 1), sizeof(char *))) == NULL)
906 for (n=0; n<pplist.portc; n++)
907 devices[n] = pplist.portv[n]->name;
938 if ((fd < 0) || (fd >= pplist.portc))
957 pplist.portv[fd]->name);
974 pplist.portv[fd]->name);
1004 if ((fd < 0) || (fd >= pplist.portc))
1023 pplist.portv[fd]->name);
1040 pplist.portv[fd]->name);
1053 (int) reg, pplist.portv[fd]->name);
1283 if ((fd < 0) || (fd >= pplist.portc))
1300 DBG (6, "sanei_pa4s2_close: port is '%s'\n", pplist.portv[fd]->name);
1333 if ((fd < 0) || (fd >= pplist.portc))
1351 DBG (6, "sanei_pa4s2_close: port is '%s'\n", pplist.portv[fd]->name);
1386 DBG (4, "sanei_pa4s2_enable: enable port '%s'\n", pplist.portv[fd]->name);
1421 pplist.portv[fd]->name);
1447 if ((fd < 0) || (fd >= pplist.portc))
1465 DBG (6, "sanei_pa4s2_close: port is '%s'\n", pplist.portv[fd]->name);
1480 DBG (6, "sanei_pa4s2_close: port is '%s'\n", pplist.portv[fd]->name);
1516 DBG (6, "sanei_pa4s2_close: port is '%s'\n", pplist.portv[fd]->name);
1548 if ((fd < 0) || (fd >= pplist.portc))
1565 DBG (6, "sanei_pa4s2_close: port is '%s'\n", pplist.portv[fd]->name);
1580 DBG (6, "sanei_pa4s2_close: port is '%s'\n", pplist.portv[fd]->name);
1653 if ((fd < 0) || (fd >= pplist.portc))
1671 DBG (6, "sanei_pa4s2_close: port is '%s'\n", pplist.portv[fd]->name);
1686 DBG (6, "sanei_pa4s2_close: port is '%s'\n", pplist.portv[fd]->name);
1757 if ((fd < 0) || (fd >= pplist.portc))
1775 DBG (6, "sanei_pa4s2_close: port is '%s'\n", pplist.portv[fd]->name);
1790 DBG (6, "sanei_pa4s2_close: port is '%s'\n", pplist.portv[fd]->name);