Lines Matching refs:Asic96Reg
279 memset( &ps->Asic96Reg, 0, sizeof(ps->Asic96Reg));
287 ps->Asic96Reg.RD_MotorControl = 0;
288 ps->Asic96Reg.RD_WatchDogControl = 0; /* org. val = 0x8f; */
479 ps->Asic96Reg.u26.RD_ModelControl2 = _Model2ChannelMult;
484 ps->Asic96Reg.u26.RD_ModelControl2 = _Model2DirectOutPort;
488 ps->Asic96Reg.u26.RD_ModelControl2 );
592 ps->Asic96Reg.RD_MotorControl = (ps->FullStep | ps->IgnorePF |
595 ps->Asic96Reg.RD_MotorControl = (ps->IgnorePF | ps->MotorOn |
617 DBG( DBG_LOW, "RD_MotorControl = 0x%02x\n", ps->Asic96Reg.RD_MotorControl );
658 ps->Asic96Reg.RD_MotorControl &= ps->StepMask;
697 ps->Asic96Reg.RD_MotorControl &= ~ps->FullStep;
701 (Byte)(ps->Asic96Reg.RD_MotorControl & ~ps->MotorOn));
702 IODataToRegister( ps, ps->RegMotorControl, ps->Asic96Reg.RD_MotorControl);
718 ps->Asic96Reg.RD_MotorControl = 0;