Lines Matching refs:tg_info
2356 } tg_info[] =
2469 rt_set_ccd_shift_clock_multiplier (regs, tg_info[tg_setting].tg_cph0p);
2470 rt_set_ccd_clock_reset_interval (regs, tg_info[tg_setting].tg_crsp);
2471 rt_set_ccd_clamp_clock_multiplier (regs, tg_info[tg_setting].tg_cclpp);
2472 rt_set_cdss (regs, tg_info[tg_setting].tg_cdss1,
2473 tg_info[tg_setting].tg_cdss2);
2474 rt_set_cdsc (regs, tg_info[tg_setting].tg_cdsc1,
2475 tg_info[tg_setting].tg_cdsc2);
3135 rt_set_ccd_shift_clock_multiplier (regs, tg_info[tg_setting].tg_cph0p);
3136 rt_set_ccd_clock_reset_interval (regs, tg_info[tg_setting].tg_crsp);
3137 rt_set_ccd_clamp_clock_multiplier (regs, tg_info[tg_setting].tg_cclpp);
3148 rt_set_cdss (regs, tg_info[tg_setting].tg_cdss1,
3149 tg_info[tg_setting].tg_cdss2);
3150 rt_set_cdsc (regs, tg_info[tg_setting].tg_cdsc1,
3151 tg_info[tg_setting].tg_cdsc2);
3181 rt_set_ccd_shift_clock_multiplier (regs, tg_info[tg_setting].tg_cph0p);
3182 rt_set_ccd_clock_reset_interval (regs, tg_info[tg_setting].tg_crsp);
3183 rt_set_ccd_clamp_clock_multiplier (regs, tg_info[tg_setting].tg_cclpp);
3194 rt_set_cdss (regs, tg_info[tg_setting].tg_cdss1,
3195 tg_info[tg_setting].tg_cdss2);
3196 rt_set_cdsc (regs, tg_info[tg_setting].tg_cdsc1,
3197 tg_info[tg_setting].tg_cdsc2);