Lines Matching refs:req
983 Artec48U_Packet req;
985 memset (req, 0, sizeof (req));
986 req[0] = 0x74;
987 req[1] = 0x01;
989 status = artec48u_device_small_req (dev, req, req);
993 *value = (SANE_Int) req[2];
1002 Artec48U_Packet req;
1004 memset (req, 0, sizeof (req));
1005 req[0] = 0x43;
1006 req[1] = 0x01;
1008 return artec48u_device_req (dev, req, req);
1016 Artec48U_Packet req;
1018 memset (req, 0, sizeof (req));
1019 req[0] = 0x35;
1020 req[1] = 0x01;
1022 status = artec48u_device_req (dev, req, req);
1026 if (req[1] == 0x35)
1028 if (req[0] == 0)
1095 Artec48U_Packet req;
1096 memset (req, 0, sizeof (req));
1097 req[0] = 0x17;
1098 req[1] = 0x01;
1100 status = artec48u_device_req (dev, req, req);
1104 if (req[0] == 0x00 && req[1] == 0x17)
1106 if (req[2] == 0 && (req[3] == 0 || req[3] == 2))
1119 Artec48U_Packet req;
1121 memset (req, 0, sizeof (req));
1122 req[0] = 0x24;
1123 req[1] = 0x01;
1125 return artec48u_device_req (dev, req, req);
1132 Artec48U_Packet req;
1134 memset (req, 0, sizeof (req));
1135 req[0] = 0x41;
1136 req[1] = 0x01;
1137 return artec48u_device_small_req (dev, req, req);
1317 Artec48U_Packet req;
1342 memset (req, 0, sizeof (req));
1343 req[0x00] = 0x20;
1344 req[0x01] = 0x01;
1345 req[0x02] = LOBYTE (abs_y0);
1346 req[0x03] = HIBYTE (abs_y0);
1347 req[0x04] = LOBYTE (abs_ys);
1348 req[0x05] = HIBYTE (abs_ys);
1349 req[0x06] = LOBYTE (abs_x0);
1350 req[0x07] = HIBYTE (abs_x0);
1351 req[0x08] = LOBYTE (abs_xs);
1352 req[0x09] = HIBYTE (abs_xs);
1353 req[0x0a] = color_mode_code;
1354 req[0x0b] = 0x60;
1355 req[0x0c] = LOBYTE (xdpi);
1356 req[0x0d] = HIBYTE (xdpi);
1357 req[0x0e] = 0x12;
1358 req[0x0f] = 0x00;
1359 req[0x10] = LOBYTE (scan_bpl);
1360 req[0x11] = HIBYTE (scan_bpl);
1361 req[0x12] = LOBYTE (scan_ys);
1362 req[0x13] = HIBYTE (scan_ys);
1363 req[0x14] = motor_mode_1;
1364 req[0x15] = motor_mode_2;
1365 req[0x16] = LOBYTE (ydpi);
1366 req[0x17] = HIBYTE (ydpi);
1367 req[0x18] = 0x00;
1369 status = artec48u_device_req (s->dev, req, req);
1416 Artec48U_Packet req;
1417 memset (req, 0, sizeof (req));
1418 req[0] = 0x22;
1419 req[1] = 0x01;
1420 req[2] = params->r_offset;
1421 req[3] = params->r_pga;
1422 req[4] = params->g_offset;
1423 req[5] = params->g_pga;
1424 req[6] = params->b_offset;
1425 req[7] = params->b_pga;
1427 return artec48u_device_req (dev, req, req);
1435 Artec48U_Packet req;
1436 memset (req, 0, sizeof (req));
1437 req[0] = 0x76;
1438 req[1] = 0x01;
1439 req[2] = req[6] = req[10] = 0x04;
1440 req[4] = LOBYTE (params->r_time);
1441 req[5] = HIBYTE (params->r_time);
1442 req[8] = LOBYTE (params->g_time);
1443 req[9] = HIBYTE (params->g_time);
1444 req[12] = LOBYTE (params->b_time);
1445 req[13] = HIBYTE (params->b_time);
1446 return artec48u_device_req (dev, req, req);