Lines Matching defs:bits
74 // as a uint64_t. The major number is the high 32 bits. The minor number is the
75 // middle 16 bits. The patch number is the low 16 bits. The pre-release label
330 #error "Wuffs requires a word size of either 32 or 64 bits"
3150 // strings, in a single- or multi-token chain, to have none of these bits set.
3168 // (so these bits are not necessarily mutually exclusive), all producing the
3219 // wuffs_base__token__value returns the token's high 46 bits, sign-extended. A
3260 // The VBD is 21 bits in the middle of t->repr. Left shift the high (64 - 21
3261 // - ETC__SHIFT) bits off, then right shift (sign-extending) back down.
3865 // Do not manipulate its bits directly; they are private implementation
3942 // wuffs_base__pixel_format__bits_per_pixel returns the number of bits per
4036 // Do not manipulate its bits directly; they are private implementation
5259 // Having both bits set is the same has having neither bit set, where the
5281 // - 16-bit: 1 sign bit, 5 exponent bits, 10 explicit significand bits.
5282 // - 32-bit: 1 sign bit, 8 exponent bits, 23 explicit significand bits.
5283 // - 64-bit: 1 sign bit, 11 exponent bits, 52 explicit significand bits.
5301 // tripping a f64-typed NaN may produce a different 64 bits. Nonetheless, the
5480 // - "%g" means neither or both bits are set.
10479 // The flags bits combine exactly one of:
10629 // DecodeImageArgFlags bits. For example, if (REPORT_METADATA_CHRM |
10655 // is 4 bytes per pixel (8 bits per channel × 4 channels).
10857 // flags bits) metadata is longer than max_incl_metadata_length.
10902 // The flags bits combine exactly one of:
11321 // The low 3 bits of a hold the prefix length, n.
11323 // The high 56 bits of a hold the prefix itself, in little-endian order. The
11324 // first prefix byte is in bits 8..=15, the second prefix byte is in bits
11325 // 16..=23, etc. The high (8 * (7 - n)) bits are ignored.
12389 // The high 5 bits of etc__hpd_left_shift[i] is N, the higher of the two
12390 // possible number of new digits. The low 11 bits are an offset into the
12391 // etc__powers_of_5 array (of length 0x051C, so offsets fit in 11 bits). When i
13115 // NaN. Shift the 52 mantissa bits to 10 mantissa bits, keeping the most
13117 // bits of ret.value so that the 10-bit mantissa is non-zero.
13149 // Re-bias from 1023 to 15 and shift above f16's 10 mantissa bits.
13154 // any of the bottom 42 bits are non-zero.
13179 // NaN. Shift the 52 mantissa bits to 23 mantissa bits, keeping the most
13181 // bits of ret.value so that the 23-bit mantissa is non-zero.
13213 // Re-bias from 1023 to 127 and shift above f32's 23 mantissa bits.
13218 // any of the bottom 29 bits are non-zero.
13614 // and that IEEE 754 double precision has 52 mantissa bits.
13887 // precision has 52 mantissa bits.
14047 // On success, it returns a non-negative int64_t such that the low 63 bits hold
14102 // 64 bits of the product, x_hi, must therefore be at least (1<<62).
14105 // right by either 9 or 10 bits (depending on x_hi's MSB) will therefore
14106 // leave the top 10 MSBs (bits 54 ..= 63) off and the 11th MSB (bit 53) on.
14111 // Before we shift right by at least 9 bits, recall that the look-up table
14118 // by at least 9 bits, that carried 1 can be ignored unless the higher 64-bit
14119 // limb's low 9 bits are all on.
14135 // Merge the 128-bit x and 128-bit y, which overlap by 64 bits, to
14137 // As we exit this if-block, we only care about the high 128 bits
14159 // bits (checking that adding 1 to merged_lo would overflow).
14177 // As mentioned above, shifting x_hi right by either 9 or 10 bits will leave
14178 // the top 10 MSBs (bits 54 ..= 63) off and the 11th MSB (bit 53) on. If the
14181 // Having bit 53 on (and higher bits off) means that ret_mantissa is a 54-bit
14189 // (x's low 73 bits are zero and the next 2 bits that matter are "01"), give
14224 // have an implicit mantissa bit. Mask that away and keep the low 52 bits.
14227 // Pack the bits and return.
14450 // Extract 53 bits for the mantissa (in base-2).
14469 // Pack the bits and return.
14472 uint64_t bits = (man2 & 0x000FFFFFFFFFFFFF) | // (1 << 52) - 1.
14478 ret.value = wuffs_base__ieee_754_bit_representation__from_u64_to_f64(bits);
14484 uint64_t bits = h->negative ? 0x8000000000000000 : 0;
14488 ret.value = wuffs_base__ieee_754_bit_representation__from_u64_to_f64(bits);
14501 uint64_t bits = h->negative ? 0xFFF0000000000000 : 0x7FF0000000000000;
14505 ret.value = wuffs_base__ieee_754_bit_representation__from_u64_to_f64(bits);
14663 // bits and 16 hexadecimal digits.
14665 // bits and 17 hexadecimal digits.
14935 // Decompose x (64 bits) into negativity (1 bit), base-2 exponent (11 bits
14936 // with a -1023 bias) and mantissa (52 bits).
14937 uint64_t bits = wuffs_base__ieee_754_bit_representation__from_f64_to_u64(x);
14938 bool neg = (bits >> 63) != 0;
14939 int32_t exp2 = ((int32_t)(bits >> 52)) & 0x7FF;
14940 uint64_t man = bits & 0x000FFFFFFFFFFFFFul;
14966 &h, exp2 - 52); // 52 mantissa bits.