Lines Matching defs:lane
27 * designed to behave like SIMD conditional operators that generate lane masks.
29 * 0/-1 to give a full lane-width bitmask.
92 * The value of @c a is stored to lane 0 (LSB) in the SIMD register.
103 * @brief Get the scalar value of a single lane.
105 template <int l> ASTCENC_SIMD_INLINE float lane() const
111 * @brief Set the scalar value of a single lane.
143 * @brief Factory that returns a vector containing the lane IDs.
155 return vfloat4(lane<l0>(), lane<l1>(), 0.0f, 0.0f);
163 return vfloat4(lane<l0>(), lane<l1>(), lane<l2>(), 0.0f);
171 return vfloat4(lane<l0>(), lane<l1>(), lane<l2>(), lane<l3>());
222 * The value of @c a is stored to lane 0 (LSB) in the SIMD register.
247 * @brief Get the scalar value of a single lane.
249 template <int l> ASTCENC_SIMD_INLINE int lane() const
255 * @brief Set the scalar value of a single lane.
297 * @brief Factory that returns a vector containing the lane IDs.
344 * The value of @c a is stored to lane 0 (LSB) in the SIMD register.
355 * @brief Get the scalar value of a single lane.
357 template <int l> ASTCENC_SIMD_INLINE float lane() const
419 * bit0 = lane 0
833 * If either lane value is NaN, @c b will be returned for that lane.
846 * If either lane value is NaN, @c b will be returned for that lane.
1014 float_to_sf16(a.lane<0>()),
1015 float_to_sf16(a.lane<1>()),
1016 float_to_sf16(a.lane<2>()),
1017 float_to_sf16(a.lane<3>()));
1034 sf16_to_float(static_cast<uint16_t>(a.lane<0>())),
1035 sf16_to_float(static_cast<uint16_t>(a.lane<1>())),
1036 sf16_to_float(static_cast<uint16_t>(a.lane<2>())),
1037 sf16_to_float(static_cast<uint16_t>(a.lane<3>())));
1115 return vint4(table[idx.lane<0>()],
1116 table[idx.lane<1>()],
1117 table[idx.lane<2>()],
1118 table[idx.lane<3>()]);
1132 return vint4(table[idx.lane<0>()],
1133 table[idx.lane<1>()],
1134 table[idx.lane<2>()],
1135 table[idx.lane<3>()]);
1150 return vint4(table[idx.lane<0>()],
1151 table[idx.lane<1>()],
1152 table[idx.lane<2>()],
1153 table[idx.lane<3>()]);
1159 * Input vectors have the value stored in the bottom 8 bits of each lane,
1162 * Output vector stores a single RGBA texel packed in each lane.
1170 * @brief Store a single vector lane to an unaligned address.
1191 store_lane(base + 0, data.lane<0>());
1192 store_lane(base + 4, data.lane<1>());
1193 store_lane(base + 8, data.lane<2>());
1197 store_lane(base + 0, data.lane<0>());
1198 store_lane(base + 4, data.lane<1>());
1202 store_lane(base + 0, data.lane<0>());