Lines Matching defs:lane
81 * The value of @c a is stored to lane 0 (LSB) in the SIMD register.
98 * @brief Get the scalar value of a single lane.
100 template <int l> ASTCENC_SIMD_INLINE float lane() const
106 * @brief Set the scalar value of a single lane.
138 * @brief Factory that returns a vector containing the lane IDs.
151 return vfloat4(lane<l0>(), lane<l1>(), 0.0f, 0.0f);
159 return vfloat4(lane<l0>(), lane<l1>(), lane<l2>(), 0.0f);
167 return vfloat4(lane<l0>(), lane<l1>(), lane<l2>(), lane<l3>());
225 * The value of @c a is stored to lane 0 (LSB) in the SIMD register.
242 * @brief Get the scalar from a single lane.
244 template <int l> ASTCENC_SIMD_INLINE int lane() const
250 * @brief Set the scalar value of a single lane.
292 * @brief Factory that returns a vector containing the lane IDs.
344 * The value of @c a is stored to lane 0 (LSB) in the SIMD register.
360 * @brief Get the scalar from a single lane.
362 template <int32_t l> ASTCENC_SIMD_INLINE bool lane() const
412 * bit0 = lane 0
753 * If either lane value is NaN, @c b will be returned for that lane.
764 * If either lane value is NaN, @c b will be returned for that lane.
919 return static_cast<uint16_t>(float_to_float16(av).lane<0>());
942 return float16_to_float(av).lane<0>();
1055 * Input vectors have the value stored in the bottom 8 bits of each lane,
1058 * Output vector stores a single RGBA texel packed in each lane.
1066 * @brief Store a single vector lane to an unaligned address.
1080 if (mask.lane<3>())
1084 else if (mask.lane<2>() != 0.0f)
1086 store_lane(base + 0, data.lane<0>());
1087 store_lane(base + 4, data.lane<1>());
1088 store_lane(base + 8, data.lane<2>());
1090 else if (mask.lane<1>() != 0.0f)
1092 store_lane(base + 0, data.lane<0>());
1093 store_lane(base + 4, data.lane<1>());
1095 else if (mask.lane<0>() != 0.0f)
1097 store_lane(base + 0, data.lane<0>());