Lines Matching defs:lane
80 * The value of @c a is stored to lane 0 (LSB) in the SIMD register.
98 * @brief Get the scalar value of a single lane.
100 template <int l> ASTCENC_SIMD_INLINE float lane() const
136 * @brief Factory that returns a vector containing the lane IDs.
196 * The value of @c a is stored to lane 0 (LSB) in the SIMD register.
214 * @brief Get the scalar from a single lane.
216 template <int l> ASTCENC_SIMD_INLINE int lane() const
261 * @brief Factory that returns a vector containing the lane IDs.
353 * bit0 = lane 0
738 * If either lane value is NaN, @c b will be returned for that lane.
748 * If either lane value is NaN, @c b will be returned for that lane.
758 * If either lane value is NaN, @c b will be returned for that lane.
768 * If either lane value is NaN, @c b will be returned for that lane.
779 * then @c min will be returned for that lane.
793 * be returned for that lane.
805 * If @c a is NaN then zero will be returned for that lane.
860 return hmin(a).lane<0>();
890 return hmax(a).lane<0>();
921 * @brief Accumulate lane-wise sums for a vector, folded 4-wide.
935 * @brief Accumulate lane-wise sums for a vector.
945 * @brief Accumulate masked lane-wise sums for a vector, folded 4-wide.
956 * @brief Accumulate masked lane-wise sums for a vector.
1053 // AVX2 duplicates the table within each 128-bit lane
1063 // AVX2 duplicates the table within each 128-bit lane
1078 // AVX2 duplicates the table within each 128-bit lane
1148 * Input vectors have the value stored in the bottom 8 bits of each lane,
1151 * Output vector stores a single RGBA texel packed in each lane.