Lines Matching defs:status
692 uint8_t status;
703 status = td->status;
706 DPRINTFN(4, "xfer=%p[%u/%u] rem=%u/%u status=%u\n",
710 (unsigned int)status);
713 * Verify the status length and
718 DPRINTF("Invalid status length, "
720 status = XHCI_TRB_ERROR_LENGTH;
730 if (status != XHCI_TRB_ERROR_SHORT_PKT &&
731 status != XHCI_TRB_ERROR_SUCCESS) {
761 return ((status == XHCI_TRB_ERROR_STALL) ? USB_ERR_STALLED :
762 (status != XHCI_TRB_ERROR_SHORT_PKT &&
763 status != XHCI_TRB_ERROR_SUCCESS) ? USB_ERR_IOERROR :
865 uint8_t status;
875 status = XHCI_TRB_2_ERROR_GET(temp);
882 halted = (status != XHCI_TRB_ERROR_SHORT_PKT &&
883 status != XHCI_TRB_ERROR_SUCCESS);
885 DPRINTF("slot=%u epno=%u remainder=%u status=%u\n",
886 index, epno, remainder, status);
956 status = XHCI_TRB_ERROR_SUCCESS;
963 td->status = status;
1591 uint32_t status;
1596 status = XREAD4(sc, oper, XHCI_USBSTS);
1599 if (status != 0) {
1600 XWRITE4(sc, oper, XHCI_USBSTS, status);
1601 DPRINTFN(16, "real interrupt (status=0x%08x)\n", status);
1613 if (status & (XHCI_STS_PCD | XHCI_STS_HCH |
1615 if (status & XHCI_STS_PCD) {
1619 if (status & XHCI_STS_HCH) {
1624 if (status & XHCI_STS_HSE) {
1629 if (status & XHCI_STS_HCE) {
1734 td->status = 0;
2181 /* check if we should append a status stage */
2192 * status stage until the next SOF. Force this
2987 /* pick out CHANGE bits from the status register */
3493 DPRINTFN(9, "port status=0x%08x\n", v);