Lines Matching defs:status
614 PRINTK("port %d status=0x%08x\n", i,
659 PRINTK(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
758 PRINTK(" status=0x%08x <%s> len=0x%x\n", hc32toh(sc, sitd->sitd_status),
775 PRINTK(" status[0]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[0]),
777 PRINTK(" status[1]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[1]),
779 PRINTK(" status[2]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[2]),
781 PRINTK(" status[3]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[3]),
783 PRINTK(" status[4]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[4]),
785 PRINTK(" status[5]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[5]),
787 PRINTK(" status[6]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[6]),
789 PRINTK(" status[7]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[7]),
1044 uint32_t status;
1055 status = hc32toh(sc, td->qtd_status);
1057 len = EHCI_QTD_GET_BYTES(status);
1060 * Verify the status length and
1065 DPRINTF("Invalid status length, "
1067 status |= EHCI_QTD_HALTED;
1080 if (status & EHCI_QTD_HALTED) {
1109 if (status & EHCI_QTD_STATERRS) {
1111 "status=%s%s%s%s%s%s%s%s\n",
1113 (status & EHCI_QTD_ACTIVE) ? "[ACTIVE]" : "[NOT_ACTIVE]",
1114 (status & EHCI_QTD_HALTED) ? "[HALTED]" : "",
1115 (status & EHCI_QTD_BUFERR) ? "[BUFERR]" : "",
1116 (status & EHCI_QTD_BABBLE) ? "[BABBLE]" : "",
1117 (status & EHCI_QTD_XACTERR) ? "[XACTERR]" : "",
1118 (status & EHCI_QTD_MISSEDMICRO) ? "[MISSED]" : "",
1119 (status & EHCI_QTD_SPLITXSTATE) ? "[SPLIT]" : "",
1120 (status & EHCI_QTD_PINGSTATE) ? "[PING]" : "");
1123 if (status & EHCI_QTD_HALTED) {
1127 if (EHCI_QTD_GET_CERR(status) == 0)
1197 uint32_t status;
1208 status = hc32toh(sc, td->sitd_status);
1214 status |= hc32toh(sc, td->sitd_status);
1216 if (!(status & EHCI_SITD_ACTIVE)) {
1228 status = td->itd_status[0];
1229 status |= td->itd_status[1];
1230 status |= td->itd_status[2];
1231 status |= td->itd_status[3];
1232 status |= td->itd_status[4];
1233 status |= td->itd_status[5];
1234 status |= td->itd_status[6];
1235 status |= td->itd_status[7];
1240 status |= td->itd_status[0];
1241 status |= td->itd_status[1];
1242 status |= td->itd_status[2];
1243 status |= td->itd_status[3];
1244 status |= td->itd_status[4];
1245 status |= td->itd_status[5];
1246 status |= td->itd_status[6];
1247 status |= td->itd_status[7];
1250 if (!(status & htohc32(sc, EHCI_ITD_ACTIVE))) {
1270 status = hc32toh(sc, qh->qh_qtd.qtd_status);
1271 if (status & EHCI_QTD_ACTIVE) {
1278 status = hc32toh(sc, td->qtd_status);
1284 if (status & EHCI_QTD_ACTIVE) {
1298 if (status & EHCI_QTD_HALTED) {
1305 if (EHCI_QTD_GET_BYTES(status)) {
1363 * writing back the qTD status, or miss signalling occasionally under
1393 uint32_t status;
1404 status = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
1406 if (status == 0) {
1410 if (!(status & sc->sc_eintrs)) {
1413 EOWRITE4(sc, EHCI_USBSTS, status); /* acknowledge */
1415 status &= sc->sc_eintrs;
1418 if (status & EHCI_STS_HSE) {
1423 if (status & EHCI_STS_PCD) {
1437 status &= ~(EHCI_STS_INT | EHCI_STS_ERRINT | EHCI_STS_PCD | EHCI_STS_IAA);
1439 if (status != 0) {
1441 sc->sc_eintrs &= ~status;
1817 /* check if we should append a status stage */
1968 /* pick out CHANGE bits from the status register */
1982 uint32_t status;
2006 status = hc32toh(sc, td->sitd_status);
2008 len = EHCI_SITD_GET_LEN(status);
2010 DPRINTFN(2, "status=0x%08x, rem=%u\n", status, len);
2035 uint32_t status;
2061 status = hc32toh(sc, td->itd_status[td_no]);
2063 len = EHCI_ITD_GET_LEN(status);
2065 DPRINTFN(2, "status=0x%08x, len=%u\n", status, len);
2072 * into the status field, and not the
2710 uint32_t status;
2808 status = (EHCI_ITD_SET_LEN(*plen) |
2811 td->itd_status[td_no] = htohc32(sc, status);
2848 status = (EHCI_ITD_SET_PG(page_no) |
2854 td->itd_status[x] |= htohc32(sc, status);
3269 DPRINTFN(9, "get port status i=%d\n",
3277 DPRINTFN(1, "port status=0x%04x\n", v);
3363 DPRINTF("ehci after reset, status=0x%08x\n", v);
3378 DPRINTF("ehci port %d reset, status = 0x%08x\n",