Lines Matching refs:port
623 static struct cxl_hdm *mock_cxl_setup_hdm(struct cxl_port *port,
626 struct cxl_hdm *cxlhdm = devm_kzalloc(&port->dev, sizeof(*cxlhdm), GFP_KERNEL);
631 cxlhdm->port = port;
635 static int mock_cxl_add_passthrough_decoder(struct cxl_port *port)
637 dev_err(&port->dev, "unexpected passthrough decoder for cxl_test\n");
665 struct cxl_port *port = to_cxl_port(cxld->dev.parent);
671 dev_dbg(&port->dev, "%s commit\n", dev_name(&cxld->dev));
672 if (cxl_num_decoders_committed(port) != id) {
673 dev_dbg(&port->dev,
675 dev_name(&cxld->dev), port->id,
676 cxl_num_decoders_committed(port));
680 port->commit_end++;
688 struct cxl_port *port = to_cxl_port(cxld->dev.parent);
694 dev_dbg(&port->dev, "%s reset\n", dev_name(&cxld->dev));
695 if (port->commit_end != id) {
696 dev_dbg(&port->dev,
698 dev_name(&cxld->dev), port->id, port->commit_end);
702 port->commit_end--;
740 struct cxl_port *port, *iter;
756 port = cxled_to_port(cxled);
758 if (port->uport_dev == &cxl_host_bridge[0]->dev) {
762 if (is_cxl_port(port->dev.parent))
763 port = to_cxl_port(port->dev.parent);
765 port = NULL;
766 } while (port);
767 port = cxled_to_port(cxled);
794 port->commit_end = cxld->id;
801 * and setup the switch and root port decoders targeting @cxlmd.
803 iter = port;
806 iter = dport->port;
810 * @port, and all ports have at least one decoder.
829 * one root port
847 struct cxl_port *port = cxlhdm->port;
848 struct cxl_port *parent_port = to_cxl_port(port->dev.parent);
851 if (is_cxl_endpoint(port))
870 cxlsd = cxl_switch_decoder_alloc(port, target_count);
872 dev_warn(&port->dev,
880 cxled = cxl_endpoint_decoder_alloc(port);
883 dev_warn(&port->dev,
893 rc = device_for_each_child(port->uport_dev, &ctx,
904 dev_err(&port->dev, "Failed to add decoder\n");
908 rc = cxl_decoder_autoremove(&port->dev, cxld);
911 dev_dbg(&cxld->dev, "Added to port %s\n", dev_name(&port->dev));
917 static int mock_cxl_port_enumerate_dports(struct cxl_port *port)
922 if (port->depth == 1) {
923 if (is_multi_bridge(port->uport_dev)) {
926 } else if (is_single_bridge(port->uport_dev)) {
930 dev_dbg(&port->dev, "%s: unknown bridge type\n",
931 dev_name(port->uport_dev));
934 } else if (port->depth == 2) {
935 struct cxl_port *parent = to_cxl_port(port->dev.parent);
944 dev_dbg(&port->dev, "%s: unknown bridge type\n",
945 dev_name(port->uport_dev));
949 dev_WARN_ONCE(&port->dev, 1, "unexpected depth %d\n",
950 port->depth);
958 if (pdev->dev.parent != port->uport_dev) {
959 dev_dbg(&port->dev, "%s: mismatch parent %s\n",
960 dev_name(port->uport_dev),
965 dport = devm_cxl_add_dport(port, &pdev->dev, pdev->id,