Lines Matching defs:i2s
37 #define DRV_NAME "tegra30-i2s"
41 struct tegra30_i2s *i2s = dev_get_drvdata(dev);
43 regcache_cache_only(i2s->regmap, true);
45 clk_disable_unprepare(i2s->clk_i2s);
52 struct tegra30_i2s *i2s = dev_get_drvdata(dev);
55 ret = clk_prepare_enable(i2s->clk_i2s);
61 regcache_cache_only(i2s->regmap, false);
62 regcache_mark_dirty(i2s->regmap);
64 ret = regcache_sync(i2s->regmap);
71 clk_disable_unprepare(i2s->clk_i2s);
79 struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
128 regmap_update_bits(i2s->regmap, TEGRA30_I2S_CTRL, mask, val);
139 struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
157 regmap_update_bits(i2s->regmap, TEGRA30_I2S_CTRL, mask, val);
168 ret = clk_set_rate(i2s->clk_i2s, i2sclock);
179 regmap_write(i2s->regmap, TEGRA30_I2S_TIMING, val);
200 i2s->soc_data->set_audio_cif(i2s->regmap, reg, &cif_conf);
204 regmap_write(i2s->regmap, TEGRA30_I2S_OFFSET, val);
209 static void tegra30_i2s_start_playback(struct tegra30_i2s *i2s)
211 tegra30_ahub_enable_tx_fifo(i2s->playback_fifo_cif);
212 regmap_update_bits(i2s->regmap, TEGRA30_I2S_CTRL,
217 static void tegra30_i2s_stop_playback(struct tegra30_i2s *i2s)
219 tegra30_ahub_disable_tx_fifo(i2s->playback_fifo_cif);
220 regmap_update_bits(i2s->regmap, TEGRA30_I2S_CTRL,
224 static void tegra30_i2s_start_capture(struct tegra30_i2s *i2s)
226 tegra30_ahub_enable_rx_fifo(i2s->capture_fifo_cif);
227 regmap_update_bits(i2s->regmap, TEGRA30_I2S_CTRL,
232 static void tegra30_i2s_stop_capture(struct tegra30_i2s *i2s)
234 regmap_update_bits(i2s->regmap, TEGRA30_I2S_CTRL,
236 tegra30_ahub_disable_rx_fifo(i2s->capture_fifo_cif);
242 struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
249 tegra30_i2s_start_playback(i2s);
251 tegra30_i2s_start_capture(i2s);
257 tegra30_i2s_stop_playback(i2s);
259 tegra30_i2s_stop_capture(i2s);
272 struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
287 regmap_update_bits(i2s->regmap, TEGRA30_I2S_SLOT_CTRL, mask, val);
289 regmap_update_bits(i2s->regmap, TEGRA30_I2S_CH_CTRL,
298 struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
300 snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data,
301 &i2s->capture_dma_data);
402 { .compatible = "nvidia,tegra124-i2s", .data = &tegra124_i2s_config },
403 { .compatible = "nvidia,tegra30-i2s", .data = &tegra30_i2s_config },
409 struct tegra30_i2s *i2s;
415 i2s = devm_kzalloc(&pdev->dev, sizeof(struct tegra30_i2s), GFP_KERNEL);
416 if (!i2s) {
420 dev_set_drvdata(&pdev->dev, i2s);
428 i2s->soc_data = soc_data;
430 i2s->dai = tegra30_i2s_dai_template;
431 i2s->dai.name = dev_name(&pdev->dev);
439 i2s->playback_i2s_cif = cif_ids[0];
440 i2s->capture_i2s_cif = cif_ids[1];
442 i2s->clk_i2s = devm_clk_get(&pdev->dev, NULL);
443 if (IS_ERR(i2s->clk_i2s)) {
444 dev_err(&pdev->dev, "Can't retrieve i2s clock\n");
445 ret = PTR_ERR(i2s->clk_i2s);
455 i2s->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
457 if (IS_ERR(i2s->regmap)) {
459 ret = PTR_ERR(i2s->regmap);
462 regcache_cache_only(i2s->regmap, true);
466 i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
467 i2s->playback_dma_data.maxburst = 4;
468 ret = tegra30_ahub_allocate_tx_fifo(&i2s->playback_fifo_cif,
469 i2s->playback_dma_chan,
470 sizeof(i2s->playback_dma_chan),
471 &i2s->playback_dma_data.addr);
476 ret = tegra30_ahub_set_rx_cif_source(i2s->playback_i2s_cif,
477 i2s->playback_fifo_cif);
483 i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
484 i2s->capture_dma_data.maxburst = 4;
485 ret = tegra30_ahub_allocate_rx_fifo(&i2s->capture_fifo_cif,
486 i2s->capture_dma_chan,
487 sizeof(i2s->capture_dma_chan),
488 &i2s->capture_dma_data.addr);
493 ret = tegra30_ahub_set_rx_cif_source(i2s->capture_fifo_cif,
494 i2s->capture_i2s_cif);
501 &i2s->dai, 1);
509 &i2s->dma_config, i2s->playback_dma_chan,
510 i2s->capture_dma_chan);
521 tegra30_ahub_unset_rx_cif_source(i2s->capture_fifo_cif);
523 tegra30_ahub_free_rx_fifo(i2s->capture_fifo_cif);
525 tegra30_ahub_unset_rx_cif_source(i2s->playback_i2s_cif);
527 tegra30_ahub_free_tx_fifo(i2s->playback_fifo_cif);
536 struct tegra30_i2s *i2s = dev_get_drvdata(&pdev->dev);
541 tegra30_ahub_unset_rx_cif_source(i2s->capture_fifo_cif);
542 tegra30_ahub_free_rx_fifo(i2s->capture_fifo_cif);
544 tegra30_ahub_unset_rx_cif_source(i2s->playback_i2s_cif);
545 tegra30_ahub_free_tx_fifo(i2s->playback_fifo_cif);