Lines Matching refs:reg
24 #define MIXER_REG(reg, id) ((reg) + ((id) * TEGRA210_MIXER_REG_STRIDE))
25 #define MIXER_REG_BASE(reg) ((reg) % TEGRA210_MIXER_REG_STRIDE)
40 #define REG_DURATION_PARAM(reg, i) ((reg) + NUM_GAIN_POLY_COEFFS + 1 + (i))
101 unsigned int reg, val;
111 reg = (addr << TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_SHIFT) &
113 reg |= TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_INIT_EN;
114 reg |= TEGRA210_MIXER_GAIN_CFG_RAM_RW_WRITE;
115 reg |= TEGRA210_MIXER_GAIN_CFG_RAM_SEQ_ACCESS_EN;
119 reg);
131 unsigned int reg = MIXER_GAIN_CFG_RAM_ADDR(id);
138 err = tegra210_mixer_write_ram(mixer, reg + i,
146 err = tegra210_mixer_write_ram(mixer, reg + NUM_GAIN_POLY_COEFFS,
161 REG_DURATION_PARAM(reg, i),
168 err = tegra210_mixer_write_ram(mixer, reg + REG_CFG_DONE_TRIGGER,
184 unsigned int reg = mc->reg;
187 i = (reg - TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_0) /
203 unsigned int reg = mc->reg, id;
207 id = (reg - TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_0) /
238 unsigned int reg,
265 reg + (id * TEGRA210_MIXER_REG_STRIDE),
375 #define ADDER_CTRL_DECL(name, reg) \
377 SOC_DAPM_SINGLE("RX1", reg, 0, 1, 0), \
378 SOC_DAPM_SINGLE("RX2", reg, 1, 1, 0), \
379 SOC_DAPM_SINGLE("RX3", reg, 2, 1, 0), \
380 SOC_DAPM_SINGLE("RX4", reg, 3, 1, 0), \
381 SOC_DAPM_SINGLE("RX5", reg, 4, 1, 0), \
382 SOC_DAPM_SINGLE("RX6", reg, 5, 1, 0), \
383 SOC_DAPM_SINGLE("RX7", reg, 6, 1, 0), \
384 SOC_DAPM_SINGLE("RX8", reg, 7, 1, 0), \
385 SOC_DAPM_SINGLE("RX9", reg, 8, 1, 0), \
386 SOC_DAPM_SINGLE("RX10", reg, 9, 1, 0), \
513 unsigned int reg)
515 if (reg < TEGRA210_MIXER_RX_LIMIT)
516 reg = MIXER_REG_BASE(reg);
517 else if (reg < TEGRA210_MIXER_TX_LIMIT)
518 reg = MIXER_REG_BASE(reg) + TEGRA210_MIXER_TX1_ENABLE;
520 switch (reg) {
537 unsigned int reg)
539 if (reg < TEGRA210_MIXER_RX_LIMIT)
540 reg = MIXER_REG_BASE(reg);
541 else if (reg < TEGRA210_MIXER_TX_LIMIT)
542 reg = MIXER_REG_BASE(reg) + TEGRA210_MIXER_TX1_ENABLE;
544 switch (reg) {
555 unsigned int reg)
557 if (reg < TEGRA210_MIXER_RX_LIMIT)
558 reg = MIXER_REG_BASE(reg);
559 else if (reg < TEGRA210_MIXER_TX_LIMIT)
560 reg = MIXER_REG_BASE(reg) + TEGRA210_MIXER_TX1_ENABLE;
562 switch (reg) {
585 unsigned int reg)
587 switch (reg) {