Lines Matching refs:params

307 	struct tegra_soc_bytes *params = (void *)kcontrol->private_value;
311 	u32 regs = params->soc.base;
312 	u32 mask = params->soc.mask;
313 	u32 shift = params->shift;
316 	for (i = 0; i < params->soc.num_regs; i++, regs += cmpnt->val_bytes) {
328 	struct tegra_soc_bytes *params = (void *)kcontrol->private_value;
332 	u32 regs = params->soc.base;
333 	u32 mask = params->soc.mask;
334 	u32 shift = params->shift;
338 	for (i = 0; i < params->soc.num_regs; i++, regs += cmpnt->val_bytes) {
353 	struct tegra_soc_bytes *params = (void *)kcontrol->private_value;
357 	u32 regs = params->soc.base;
358 	u32 num_regs = params->soc.num_regs;
381 	struct tegra_soc_bytes *params = (void *)kcontrol->private_value;
385 	u32 regs = params->soc.base;
386 	u32 num_regs = params->soc.num_regs;
414 	struct tegra_soc_bytes *params = (void *)kcontrol->private_value;
418 	memset(data, 0, params->soc.num_regs * cmpnt->val_bytes);
426 	struct tegra_soc_bytes *params = (void *)kcontrol->private_value;
429 	u32 reg_ctrl = params->soc.base;
434 				 params->shift, data, params->soc.num_regs);
442 	struct soc_bytes *params = (void *)kcontrol->private_value;
445 	uinfo->count = params->num_regs * sizeof(u32);
784 		const struct tegra210_mbdrc_band_params *params =
792 					 0, (u32 *)&params->biquad_params[0],
807 	/* Initialize MBDRC registers and AHUB RAM with default params */
847 		const struct tegra210_mbdrc_band_params *params =
854 			params->iir_stages <<
860 			params->in_attack_tc <<
866 			params->in_release_tc <<
872 			params->fast_attack_tc <<
875 		val = (((params->in_threshold[0] >>
878 			((params->in_threshold[1] >>
881 			((params->in_threshold[2] >>
884 			((params->in_threshold[3] >>
892 		val = (((params->out_threshold[0] >>
895 			((params->out_threshold[1] >>
898 			((params->out_threshold[2] >>
901 			((params->out_threshold[3] >>
912 			params->ratio[0] << TEGRA210_MBDRC_RATIO_1ST_SHIFT);
917 			params->ratio[1] << TEGRA210_MBDRC_RATIO_2ND_SHIFT);
922 			params->ratio[2] << TEGRA210_MBDRC_RATIO_3RD_SHIFT);
927 			params->ratio[3] << TEGRA210_MBDRC_RATIO_4TH_SHIFT);
932 			params->ratio[4] << TEGRA210_MBDRC_RATIO_5TH_SHIFT);
937 			params->makeup_gain <<
943 			params->gain_init <<
949 			params->gain_attack_tc <<
955 			params->gain_release_tc <<
961 			params->fast_release_tc <<
967 			(u32 *)&params->biquad_params[0],