Lines Matching defs:tdm
127 /* data related to DMA transfers b/w tdm and DMAC */
136 static inline u32 jh7110_tdm_readl(struct jh7110_tdm_dev *tdm, u16 reg)
138 return readl_relaxed(tdm->tdm_base + reg);
141 static inline void jh7110_tdm_writel(struct jh7110_tdm_dev *tdm, u16 reg, u32 val)
143 writel_relaxed(val, tdm->tdm_base + reg);
146 static void jh7110_tdm_save_context(struct jh7110_tdm_dev *tdm,
150 tdm->saved_pcmtxcr = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
152 tdm->saved_pcmrxcr = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
155 static void jh7110_tdm_start(struct jh7110_tdm_dev *tdm,
160 data = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
161 jh7110_tdm_writel(tdm, TDM_PCMGBCR, data | PCMGBCR_ENABLE);
165 jh7110_tdm_writel(tdm, TDM_PCMTXCR, tdm->saved_pcmtxcr | PCMTXCR_TXEN);
167 jh7110_tdm_writel(tdm, TDM_PCMRXCR, tdm->saved_pcmrxcr | PCMRXCR_RXEN);
170 static void jh7110_tdm_stop(struct jh7110_tdm_dev *tdm,
176 val = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
178 jh7110_tdm_writel(tdm, TDM_PCMTXCR, val);
180 val = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
182 jh7110_tdm_writel(tdm, TDM_PCMRXCR, val);
186 static int jh7110_tdm_syncdiv(struct jh7110_tdm_dev *tdm)
190 if (tdm->rx.sl >= tdm->tx.sl)
191 sl = tdm->rx.sl;
193 sl = tdm->tx.sl;
195 if (tdm->rx.sscale >= tdm->tx.sscale)
196 sscale = tdm->rx.sscale;
198 sscale = tdm->tx.sscale;
200 syncdiv = tdm->pcmclk / tdm->samplerate - 1;
203 dev_err(tdm->dev, "Failed to set syncdiv!\n");
207 if (tdm->syncm == TDM_SYNCM_LONG &&
208 (tdm->rx.sscale <= 1 || tdm->tx.sscale <= 1) &&
210 dev_err(tdm->dev, "Wrong syncdiv! It must be (syncdiv+1) > max[tx.sl, rx.sl]\n");
214 jh7110_tdm_writel(tdm, TDM_PCMDIV, syncdiv);
218 static int jh7110_tdm_config(struct jh7110_tdm_dev *tdm,
224 ret = jh7110_tdm_syncdiv(tdm);
228 datarx = (tdm->rx.ifl << IFL_BIT) |
229 (tdm->rx.wl << WL_BIT) |
230 (tdm->rx.sscale << SSCALE_BIT) |
231 (tdm->rx.sl << SL_BIT) |
232 (tdm->rx.lrj << LRJ_BIT);
234 datatx = (tdm->tx.ifl << IFL_BIT) |
235 (tdm->tx.wl << WL_BIT) |
236 (tdm->tx.sscale << SSCALE_BIT) |
237 (tdm->tx.sl << SL_BIT) |
238 (tdm->tx.lrj << LRJ_BIT);
241 jh7110_tdm_writel(tdm, TDM_PCMTXCR, datatx);
243 jh7110_tdm_writel(tdm, TDM_PCMRXCR, datarx);
248 static void jh7110_tdm_clk_disable(struct jh7110_tdm_dev *tdm)
250 clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
253 static int jh7110_tdm_clk_enable(struct jh7110_tdm_dev *tdm)
257 ret = clk_bulk_prepare_enable(ARRAY_SIZE(tdm->clks), tdm->clks);
259 dev_err(tdm->dev, "Failed to enable tdm clocks\n");
263 ret = reset_control_deassert(tdm->resets);
265 dev_err(tdm->dev, "Failed to deassert tdm resets\n");
269 /* select tdm_ext clock as the clock source for tdm */
270 ret = clk_set_parent(tdm->clks[5].clk, tdm->clks[4].clk);
272 dev_err(tdm->dev, "Can't set extern clock source for clk_tdm\n");
279 clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
286 struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
288 jh7110_tdm_clk_disable(tdm);
294 struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
296 return jh7110_tdm_clk_enable(tdm);
301 struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
304 tdm->saved_pcmgbcr = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
305 tdm->saved_pcmdiv = jh7110_tdm_readl(tdm, TDM_PCMDIV);
312 struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
315 jh7110_tdm_writel(tdm, TDM_PCMGBCR, tdm->saved_pcmgbcr);
316 jh7110_tdm_writel(tdm, TDM_PCMDIV, tdm->saved_pcmdiv);
322 .name = "jh7110-tdm",
340 struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
349 tdm->samplerate = params_rate(params);
350 tdm->pcmclk = params_channels(params) * tdm->samplerate * data_width;
366 dev_err(tdm->dev, "tdm: unsupported PCM fmt");
379 dev_err(tdm->dev, "channel not supported\n");
384 tdm->tx.wl = chan_wl;
385 tdm->tx.sl = chan_sl;
386 tdm->tx.sscale = chan_nr;
387 tdm->play_dma_data.addr_width = dma_bus_width;
388 dma_data = &tdm->play_dma_data;
390 tdm->rx.wl = chan_wl;
391 tdm->rx.sl = chan_sl;
392 tdm->rx.sscale = chan_nr;
393 tdm->capture_dma_data.addr_width = dma_bus_width;
394 dma_data = &tdm->capture_dma_data;
399 ret = jh7110_tdm_config(tdm, substream);
403 jh7110_tdm_save_context(tdm, substream);
410 struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
417 jh7110_tdm_start(tdm, substream);
423 jh7110_tdm_stop(tdm, substream);
436 struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(cpu_dai);
443 tdm->ms_mode = TDM_AS_MASTER;
447 tdm->ms_mode = TDM_AS_SLAVE;
453 dev_dbg(tdm->dev, "dwc : Invalid clock provider format\n");
457 gbcr = (tdm->clkpolity << CLKPOL_BIT) |
458 (tdm->elm << ELM_BIT) |
459 (tdm->syncm << SYNCM_BIT) |
460 (tdm->ms_mode << MS_BIT);
461 jh7110_tdm_writel(tdm, TDM_PCMGBCR, gbcr);
468 struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
470 snd_soc_dai_init_dma_data(dai, &tdm->play_dma_data, &tdm->capture_dma_data);
471 snd_soc_dai_set_drvdata(dai, tdm);
530 static void jh7110_tdm_init_params(struct jh7110_tdm_dev *tdm)
532 tdm->clkpolity = TDM_TX_RASING_RX_FALLING;
533 tdm->elm = TDM_ELM_LATE;
534 tdm->syncm = TDM_SYNCM_SHORT;
536 tdm->rx.ifl = TDM_FIFO_HALF;
537 tdm->tx.ifl = TDM_FIFO_HALF;
538 tdm->rx.wl = TDM_16BIT_WORD_LEN;
539 tdm->tx.wl = TDM_16BIT_WORD_LEN;
540 tdm->rx.sscale = 2;
541 tdm->tx.sscale = 2;
542 tdm->rx.lrj = TDM_LEFT_JUSTIFT;
543 tdm->tx.lrj = TDM_LEFT_JUSTIFT;
545 tdm->play_dma_data.addr = JH7110_TDM_FIFO;
546 tdm->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
547 tdm->play_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
548 tdm->play_dma_data.maxburst = 16;
550 tdm->capture_dma_data.addr = JH7110_TDM_FIFO;
551 tdm->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
552 tdm->capture_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
553 tdm->capture_dma_data.maxburst = 8;
557 struct jh7110_tdm_dev *tdm)
561 tdm->clks[0].id = "mclk_inner";
562 tdm->clks[1].id = "tdm_ahb";
563 tdm->clks[2].id = "tdm_apb";
564 tdm->clks[3].id = "tdm_internal";
565 tdm->clks[4].id = "tdm_ext";
566 tdm->clks[5].id = "tdm";
568 ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(tdm->clks), tdm->clks);
570 dev_err(&pdev->dev, "Failed to get tdm clocks\n");
574 tdm->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
575 if (IS_ERR(tdm->resets)) {
576 dev_err(&pdev->dev, "Failed to get tdm resets\n");
577 return PTR_ERR(tdm->resets);
585 struct jh7110_tdm_dev *tdm;
588 tdm = devm_kzalloc(&pdev->dev, sizeof(*tdm), GFP_KERNEL);
589 if (!tdm)
592 tdm->tdm_base = devm_platform_ioremap_resource(pdev, 0);
593 if (IS_ERR(tdm->tdm_base))
594 return PTR_ERR(tdm->tdm_base);
596 tdm->dev = &pdev->dev;
598 ret = jh7110_tdm_clk_reset_get(pdev, tdm);
600 dev_err(&pdev->dev, "Failed to enable audio-tdm clock\n");
604 jh7110_tdm_init_params(tdm);
606 dev_set_drvdata(&pdev->dev, tdm);
643 { .compatible = "starfive,jh7110-tdm", },
658 .name = "jh7110-tdm",