Lines Matching defs:sdev
58 static int hda_setup_bdle(struct snd_sof_dev *sdev,
64 struct hdac_bus *bus = sof_to_bus(sdev);
72 dev_err(sdev->dev, "error: stream frags exceeded\n");
106 int hda_dsp_stream_setup_bdl(struct snd_sof_dev *sdev,
110 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
116 dev_dbg(sdev->dev, "period_bytes:0x%x\n", period_bytes);
122 dev_dbg(sdev->dev, "periods:%d\n", periods);
143 offset = hda_setup_bdle(sdev, dmab,
147 offset = hda_setup_bdle(sdev, dmab,
155 int hda_dsp_stream_spib_config(struct snd_sof_dev *sdev,
162 if (!sdev->bar[HDA_DSP_SPIB_BAR]) {
163 dev_err(sdev->dev, "error: address of spib capability is NULL\n");
170 snd_sof_dsp_update_bits(sdev, HDA_DSP_SPIB_BAR,
175 sof_io_write(sdev, hstream->spib_addr, size);
182 hda_dsp_stream_get(struct snd_sof_dev *sdev, int direction, u32 flags)
184 const struct sof_intel_dsp_desc *chip_info = get_chip_info(sdev->pdata);
185 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
186 struct hdac_bus *bus = sof_to_bus(sdev);
213 dev_err(sdev->dev, "error: no free %s streams\n",
228 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
238 int hda_dsp_stream_put(struct snd_sof_dev *sdev, int direction, int stream_tag)
240 const struct sof_intel_dsp_desc *chip_info = get_chip_info(sdev->pdata);
241 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
242 struct hdac_bus *bus = sof_to_bus(sdev);
274 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_EM2,
280 dev_err(sdev->dev, "%s: stream_tag %d not opened!\n",
288 static int hda_dsp_stream_reset(struct snd_sof_dev *sdev, struct hdac_stream *hstream)
295 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset, SOF_STREAM_SD_OFFSET_CRST,
298 val = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, sd_offset);
303 dev_err(sdev->dev, "timeout waiting for stream reset\n");
310 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset, SOF_STREAM_SD_OFFSET_CRST, 0x0);
315 val = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, sd_offset);
320 dev_err(sdev->dev, "timeout waiting for stream to exit reset\n");
327 int hda_dsp_stream_trigger(struct snd_sof_dev *sdev,
339 if (!sdev->dspless_mode_selected)
346 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
350 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
357 ret = snd_sof_dsp_read_poll_timeout(sdev,
369 if (!sdev->dspless_mode_selected)
374 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
379 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_HDA_BAR,
386 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,
391 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
397 dev_err(sdev->dev, "error: unknown command: %d\n", cmd);
404 dev_err(sdev->dev,
414 int hda_dsp_iccmax_stream_hw_params(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream,
424 dev_err(sdev->dev, "error: no stream available\n");
429 dev_err(sdev->dev, "error: no dma buffer allocated!\n");
437 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,
440 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,
446 ret = hda_dsp_stream_setup_bdl(sdev, dmab, hstream);
448 dev_err(sdev->dev, "error: set up of BDL failed\n");
453 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,
456 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,
461 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,
466 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
471 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
475 snd_sof_dsp_update8(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_LTRP,
479 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset,
489 int hda_dsp_stream_hw_params(struct snd_sof_dev *sdev,
494 const struct sof_intel_dsp_desc *chip = get_chip_info(sdev->pdata);
495 struct hdac_bus *bus = sof_to_bus(sdev);
503 dev_err(sdev->dev, "error: no stream available\n");
508 dev_err(sdev->dev, "error: no dma buffer allocated!\n");
517 if (!sdev->dspless_mode_selected)
518 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
522 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset,
526 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_HDA_BAR,
535 dev_err(sdev->dev,
542 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
548 ret = hda_dsp_stream_reset(sdev, hstream);
556 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,
559 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,
564 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset,
568 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_HDA_BAR,
577 dev_err(sdev->dev,
584 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
591 ret = hda_dsp_stream_setup_bdl(sdev, dmab, hstream);
593 dev_err(sdev->dev, "error: set up of BDL failed\n");
598 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset,
604 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,
620 if (!sdev->dspless_mode_selected && (chip->quirks & SOF_INTEL_PROCEN_FMT_QUIRK))
622 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
626 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
631 if (!sdev->dspless_mode_selected && (chip->quirks & SOF_INTEL_PROCEN_FMT_QUIRK))
633 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
637 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
642 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,
645 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,
651 !(snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_ADSP_DPLBASE)
653 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_ADSP_DPUBASE,
655 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_ADSP_DPLBASE,
661 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset,
668 snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR,
680 int hda_dsp_stream_hw_free(struct snd_sof_dev *sdev,
689 ret = hda_dsp_stream_reset(sdev, hstream);
693 if (!sdev->dspless_mode_selected) {
694 struct hdac_bus *bus = sof_to_bus(sdev);
700 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR,
705 hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_DISABLE, 0);
712 bool hda_dsp_check_stream_irq(struct snd_sof_dev *sdev)
714 struct hdac_bus *bus = sof_to_bus(sdev);
721 status = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS);
723 trace_sof_intel_hda_dsp_check_stream_irq(sdev, status);
787 struct snd_sof_dev *sdev = context;
788 struct hdac_bus *bus = sof_to_bus(sdev);
800 status = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS);
807 active |= hda_codec_check_rirb_status(sdev);
815 int hda_dsp_stream_init(struct snd_sof_dev *sdev)
817 struct hdac_bus *bus = sof_to_bus(sdev);
820 struct pci_dev *pci = to_pci_dev(sdev->dev);
826 gcap = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_GCAP);
827 dev_dbg(sdev->dev, "hda global caps = 0x%x\n", gcap);
834 dev_dbg(sdev->dev, "detected %d playback and %d capture streams\n",
838 dev_err(sdev->dev, "error: too many playback streams %d\n",
844 dev_err(sdev->dev, "error: too many capture streams %d\n",
857 dev_err(sdev->dev, "error: posbuffer dma alloc failed\n");
868 dev_err(sdev->dev, "error: RB alloc failed\n");
876 hda_stream = devm_kzalloc(sdev->dev, sizeof(*hda_stream),
881 hda_stream->sdev = sdev;
885 if (sdev->bar[HDA_DSP_PP_BAR]) {
886 hext_stream->pphc_addr = sdev->bar[HDA_DSP_PP_BAR] +
889 hext_stream->pplc_addr = sdev->bar[HDA_DSP_PP_BAR] +
897 if (sdev->bar[HDA_DSP_SPIB_BAR]) {
898 hstream->spib_addr = sdev->bar[HDA_DSP_SPIB_BAR] +
902 hstream->fifo_addr = sdev->bar[HDA_DSP_SPIB_BAR] +
911 hstream->sd_addr = sdev->bar[HDA_DSP_HDA_BAR] + sd_offset;
927 dev_err(sdev->dev, "error: stream bdl dma alloc failed\n");
943 void hda_dsp_stream_free(struct snd_sof_dev *sdev)
945 struct hdac_bus *bus = sof_to_bus(sdev);
968 devm_kfree(sdev->dev, hda_stream);
977 struct snd_sof_dev *sdev = hda_stream->sdev;
1001 pos = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR,
1021 snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR,
1032 pos = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR,
1046 dev_err_once(sdev->dev, "hda_position_quirk value %d not supported\n",