Lines Matching defs:hext_stream
50 struct hdac_ext_stream *hext_stream;
55 hext_stream = hda_dsp_stream_get(sdev, direction, 0);
57 if (!hext_stream) {
61 hstream = &hext_stream->hstream;
76 ret = hda_dsp_iccmax_stream_hw_params(sdev, hext_stream, dmab, NULL);
82 ret = hda_dsp_stream_hw_params(sdev, hext_stream, dmab, NULL);
87 hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_ENABLE, size);
90 return hext_stream;
223 struct hdac_ext_stream *hext_stream, int cmd)
225 struct hdac_stream *hstream = &hext_stream->hstream;
245 return hda_dsp_stream_trigger(sdev, hext_stream, cmd);
250 struct hdac_ext_stream *hext_stream)
252 struct hdac_stream *hstream = &hext_stream->hstream;
257 ret = hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_DISABLE, 0);
281 int hda_cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream)
288 ret = cl_trigger(sdev, hext_stream, SNDRV_PCM_TRIGGER_START);
311 ret = cl_trigger(sdev, hext_stream, SNDRV_PCM_TRIGGER_STOP);
388 struct hdac_ext_stream *hext_stream;
421 hext_stream = hda_cl_stream_prepare(sdev, HDA_CL_STREAM_FORMAT,
424 if (IS_ERR(hext_stream)) {
426 return PTR_ERR(hext_stream);
439 ret = chip_info->cl_init(sdev, hext_stream->hstream.stream_tag, false);
480 ret = hda_cl_copy_fw(sdev, hext_stream);
496 ret1 = hda_cl_cleanup(sdev, &dmab, hext_stream);
523 struct hdac_ext_stream *hext_stream;
538 hext_stream = hda_cl_stream_prepare(sdev, HDA_CL_STREAM_FORMAT,
541 if (IS_ERR(hext_stream)) {
543 return PTR_ERR(hext_stream);
548 msg.primary = hext_stream->hstream.stream_tag - 1;
554 ret = cl_trigger(sdev, hext_stream, SNDRV_PCM_TRIGGER_START);
562 ret1 = cl_trigger(sdev, hext_stream, SNDRV_PCM_TRIGGER_STOP);
571 ret1 = hda_cl_cleanup(sdev, &dmab, hext_stream);