Lines Matching defs:msg
27 * interrupt and send reply msg to dsp
44 * set DONE bit - tell DSP we have received the reply msg
59 int hda_dsp_ipc_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)
62 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data,
63 msg->msg_size);
72 /* pm setting is only supported by module msg */
84 struct snd_sof_ipc_msg *msg)
86 struct sof_ipc4_msg *msg_data = msg->msg_data;
88 /* Schedule a delayed work for d0i3 entry after sending non-pm ipc msg */
96 int hda_dsp_ipc4_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)
99 struct sof_ipc4_msg *msg_data = msg->msg_data;
102 hdev->delayed_ipc_tx_msg = msg;
117 hda_dsp_ipc4_schedule_d0i3_work(hdev, msg);
124 struct snd_sof_ipc_msg *msg = sdev->msg;
133 if (!msg) {
138 hdr = msg->msg_data;
149 memcpy(msg->reply_data, &reply, sizeof(reply));
151 msg->reply_error = 0;
192 struct sof_ipc4_msg *data = sdev->ipc->msg.reply_data;
214 sdev->ipc->msg.rx_data = ¬ification_data;
216 sdev->ipc->msg.rx_data = NULL;
247 u32 msg;
260 msg = hipci & HDA_DSP_REG_HIPCI_MSG_MASK;
263 trace_sof_intel_ipc_firmware_response(sdev, msg, msg_ext);
285 snd_sof_ipc_reply(sdev, msg);
293 msg);
301 msg = hipct & HDA_DSP_REG_HIPCT_MSG_MASK;
304 trace_sof_intel_ipc_firmware_initiated(sdev, msg, msg_ext);