Lines Matching defs:sdev
52 struct snd_sof_dev *sdev;
74 static int imx8ulp_get_mailbox_offset(struct snd_sof_dev *sdev)
79 static int imx8ulp_get_window_offset(struct snd_sof_dev *sdev, u32 id)
89 spin_lock_irqsave(&priv->sdev->ipc_lock, flags);
91 snd_sof_ipc_process_reply(priv->sdev, 0);
93 spin_unlock_irqrestore(&priv->sdev->ipc_lock, flags);
102 sof_mailbox_read(priv->sdev, priv->sdev->debug_box.offset + 4, &p, sizeof(p));
106 snd_sof_dsp_panic(priv->sdev, p, true);
108 snd_sof_ipc_msgs_rx(priv->sdev);
116 static int imx8ulp_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)
118 struct imx8ulp_priv *priv = sdev->pdata->hw_pdata;
120 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data,
127 static int imx8ulp_run(struct snd_sof_dev *sdev)
129 struct imx8ulp_priv *priv = sdev->pdata->hw_pdata;
136 static int imx8ulp_reset(struct snd_sof_dev *sdev)
138 struct imx8ulp_priv *priv = sdev->pdata->hw_pdata;
162 static int imx8ulp_probe(struct snd_sof_dev *sdev)
165 container_of(sdev->dev, struct platform_device, dev);
182 sdev->num_cores = 1;
183 sdev->pdata->hw_pdata = priv;
184 priv->dev = sdev->dev;
185 priv->sdev = sdev;
192 priv->ipc_dev = platform_device_register_data(sdev->dev, "imx-dsp",
202 dev_err(sdev->dev, "Failed to get drvdata\n");
215 dev_err(sdev->dev, "error: failed to get DSP base at idx 0\n");
220 sdev->bar[SOF_FW_BLK_TYPE_IRAM] = devm_ioremap(sdev->dev, base, size);
221 if (!sdev->bar[SOF_FW_BLK_TYPE_IRAM]) {
222 dev_err(sdev->dev, "failed to ioremap base 0x%x size 0x%x\n",
227 sdev->mmio_bar = SOF_FW_BLK_TYPE_IRAM;
243 sdev->bar[SOF_FW_BLK_TYPE_SRAM] = devm_ioremap_wc(sdev->dev, res.start,
245 if (!sdev->bar[SOF_FW_BLK_TYPE_SRAM]) {
246 dev_err(sdev->dev, "failed to ioremap mem 0x%x size 0x%x\n",
251 sdev->mailbox_bar = SOF_FW_BLK_TYPE_SRAM;
254 sdev->dsp_box.offset = MBOX_OFFSET;
256 ret = of_reserved_mem_device_init(sdev->dev);
265 ret = imx8_parse_clocks(sdev, priv->clks);
269 ret = imx8_enable_clocks(sdev, priv->clks);
281 static int imx8ulp_remove(struct snd_sof_dev *sdev)
283 struct imx8ulp_priv *priv = sdev->pdata->hw_pdata;
285 imx8_disable_clocks(sdev, priv->clks);
292 static int imx8ulp_get_bar_index(struct snd_sof_dev *sdev, u32 type)
297 static int imx8ulp_suspend(struct snd_sof_dev *sdev)
300 struct imx8ulp_priv *priv = (struct imx8ulp_priv *)sdev->pdata->hw_pdata;
308 imx8_disable_clocks(sdev, priv->clks);
313 static int imx8ulp_resume(struct snd_sof_dev *sdev)
315 struct imx8ulp_priv *priv = (struct imx8ulp_priv *)sdev->pdata->hw_pdata;
318 imx8_enable_clocks(sdev, priv->clks);
326 static int imx8ulp_dsp_runtime_resume(struct snd_sof_dev *sdev)
333 imx8ulp_resume(sdev);
335 return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
338 static int imx8ulp_dsp_runtime_suspend(struct snd_sof_dev *sdev)
345 imx8ulp_suspend(sdev);
347 return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
350 static int imx8ulp_dsp_suspend(struct snd_sof_dev *sdev, unsigned int target_state)
357 if (!pm_runtime_suspended(sdev->dev))
358 imx8ulp_suspend(sdev);
360 return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
363 static int imx8ulp_dsp_resume(struct snd_sof_dev *sdev)
370 imx8ulp_resume(sdev);
372 if (pm_runtime_suspended(sdev->dev)) {
373 pm_runtime_disable(sdev->dev);
374 pm_runtime_set_active(sdev->dev);
375 pm_runtime_mark_last_busy(sdev->dev);
376 pm_runtime_enable(sdev->dev);
377 pm_runtime_idle(sdev->dev);
380 return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
408 static int imx8ulp_dsp_set_power_state(struct snd_sof_dev *sdev,
411 sdev->dsp_power_state = *target_state;