Lines Matching defs:sdev
51 struct snd_sof_dev *sdev;
63 static int imx8m_get_mailbox_offset(struct snd_sof_dev *sdev)
68 static int imx8m_get_window_offset(struct snd_sof_dev *sdev, u32 id)
78 spin_lock_irqsave(&priv->sdev->ipc_lock, flags);
79 snd_sof_ipc_process_reply(priv->sdev, 0);
80 spin_unlock_irqrestore(&priv->sdev->ipc_lock, flags);
89 sof_mailbox_read(priv->sdev, priv->sdev->debug_box.offset + 4, &p, sizeof(p));
93 snd_sof_dsp_panic(priv->sdev, p, true);
95 snd_sof_ipc_msgs_rx(priv->sdev);
103 static int imx8m_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)
105 struct imx8m_priv *priv = sdev->pdata->hw_pdata;
107 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data,
117 static int imx8m_run(struct snd_sof_dev *sdev)
119 struct imx8m_priv *priv = (struct imx8m_priv *)sdev->pdata->hw_pdata;
126 static int imx8m_reset(struct snd_sof_dev *sdev)
128 struct imx8m_priv *priv = (struct imx8m_priv *)sdev->pdata->hw_pdata;
150 static int imx8m_probe(struct snd_sof_dev *sdev)
153 container_of(sdev->dev, struct platform_device, dev);
170 sdev->num_cores = 1;
171 sdev->pdata->hw_pdata = priv;
172 priv->dev = sdev->dev;
173 priv->sdev = sdev;
175 priv->ipc_dev = platform_device_register_data(sdev->dev, "imx-dsp",
185 dev_err(sdev->dev, "Failed to get drvdata\n");
198 dev_err(sdev->dev, "error: failed to get DSP base at idx 0\n");
203 priv->dap = devm_ioremap(sdev->dev, IMX8M_DAP_DEBUG, IMX8M_DAP_DEBUG_SIZE);
205 dev_err(sdev->dev, "error: failed to map DAP debug memory area");
210 sdev->bar[SOF_FW_BLK_TYPE_IRAM] = devm_ioremap(sdev->dev, base, size);
211 if (!sdev->bar[SOF_FW_BLK_TYPE_IRAM]) {
212 dev_err(sdev->dev, "failed to ioremap base 0x%x size 0x%x\n",
217 sdev->mmio_bar = SOF_FW_BLK_TYPE_IRAM;
233 sdev->bar[SOF_FW_BLK_TYPE_SRAM] = devm_ioremap_wc(sdev->dev, res.start,
235 if (!sdev->bar[SOF_FW_BLK_TYPE_SRAM]) {
236 dev_err(sdev->dev, "failed to ioremap mem 0x%x size 0x%x\n",
241 sdev->mailbox_bar = SOF_FW_BLK_TYPE_SRAM;
244 sdev->dsp_box.offset = MBOX_OFFSET;
248 dev_err(sdev->dev, "cannot find dsp-ctrl registers");
257 ret = imx8_parse_clocks(sdev, priv->clks);
261 ret = imx8_enable_clocks(sdev, priv->clks);
272 static int imx8m_remove(struct snd_sof_dev *sdev)
274 struct imx8m_priv *priv = sdev->pdata->hw_pdata;
276 imx8_disable_clocks(sdev, priv->clks);
283 static int imx8m_get_bar_index(struct snd_sof_dev *sdev, u32 type)
320 static int imx8m_dsp_set_power_state(struct snd_sof_dev *sdev,
323 sdev->dsp_power_state = *target_state;
328 static int imx8m_resume(struct snd_sof_dev *sdev)
330 struct imx8m_priv *priv = (struct imx8m_priv *)sdev->pdata->hw_pdata;
334 ret = imx8_enable_clocks(sdev, priv->clks);
344 static void imx8m_suspend(struct snd_sof_dev *sdev)
346 struct imx8m_priv *priv = (struct imx8m_priv *)sdev->pdata->hw_pdata;
352 imx8_disable_clocks(sdev, priv->clks);
355 static int imx8m_dsp_runtime_resume(struct snd_sof_dev *sdev)
362 ret = imx8m_resume(sdev);
366 return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
369 static int imx8m_dsp_runtime_suspend(struct snd_sof_dev *sdev)
375 imx8m_suspend(sdev);
377 return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
380 static int imx8m_dsp_resume(struct snd_sof_dev *sdev)
387 ret = imx8m_resume(sdev);
391 if (pm_runtime_suspended(sdev->dev)) {
392 pm_runtime_disable(sdev->dev);
393 pm_runtime_set_active(sdev->dev);
394 pm_runtime_mark_last_busy(sdev->dev);
395 pm_runtime_enable(sdev->dev);
396 pm_runtime_idle(sdev->dev);
399 return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
402 static int imx8m_dsp_suspend(struct snd_sof_dev *sdev, unsigned int target_state)
408 if (!pm_runtime_suspended(sdev->dev))
409 imx8m_suspend(sdev);
411 return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);