Lines Matching defs:sdev
53 struct snd_sof_dev *sdev;
70 static int imx8_get_mailbox_offset(struct snd_sof_dev *sdev)
75 static int imx8_get_window_offset(struct snd_sof_dev *sdev, u32 id)
85 spin_lock_irqsave(&priv->sdev->ipc_lock, flags);
86 snd_sof_ipc_process_reply(priv->sdev, 0);
87 spin_unlock_irqrestore(&priv->sdev->ipc_lock, flags);
96 sof_mailbox_read(priv->sdev, priv->sdev->debug_box.offset + 4, &p, sizeof(p));
100 snd_sof_dsp_panic(priv->sdev, p, true);
102 snd_sof_ipc_msgs_rx(priv->sdev);
110 static int imx8_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)
112 struct imx8_priv *priv = sdev->pdata->hw_pdata;
114 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data,
124 static int imx8x_run(struct snd_sof_dev *sdev)
126 struct imx8_priv *dsp_priv = sdev->pdata->hw_pdata;
132 dev_err(sdev->dev, "Error system address offset source select\n");
139 dev_err(sdev->dev, "Error system address offset of AUDIO\n");
146 dev_err(sdev->dev, "Error system address offset of PERIPH %d\n",
154 dev_err(sdev->dev, "Error system address offset of IRQ\n");
164 static int imx8_run(struct snd_sof_dev *sdev)
166 struct imx8_priv *dsp_priv = sdev->pdata->hw_pdata;
172 dev_err(sdev->dev, "Error system address offset source select\n");
182 static int imx8_probe(struct snd_sof_dev *sdev)
185 container_of(sdev->dev, struct platform_device, dev);
203 sdev->num_cores = 1;
204 sdev->pdata->hw_pdata = priv;
205 priv->dev = sdev->dev;
206 priv->sdev = sdev;
212 dev_err(sdev->dev, "no power-domains property in %pOF\n", np);
245 dev_err(sdev->dev, "Cannot obtain SCU handle (err = %d)\n",
250 priv->ipc_dev = platform_device_register_data(sdev->dev, "imx-dsp",
262 dev_err(sdev->dev, "Failed to get drvdata\n");
275 dev_err(sdev->dev, "error: failed to get DSP base at idx 0\n");
280 sdev->bar[SOF_FW_BLK_TYPE_IRAM] = devm_ioremap(sdev->dev, base, size);
281 if (!sdev->bar[SOF_FW_BLK_TYPE_IRAM]) {
282 dev_err(sdev->dev, "failed to ioremap base 0x%x size 0x%x\n",
287 sdev->mmio_bar = SOF_FW_BLK_TYPE_IRAM;
303 sdev->bar[SOF_FW_BLK_TYPE_SRAM] = devm_ioremap_wc(sdev->dev, res.start,
305 if (!sdev->bar[SOF_FW_BLK_TYPE_SRAM]) {
306 dev_err(sdev->dev, "failed to ioremap mem 0x%x size 0x%x\n",
311 sdev->mailbox_bar = SOF_FW_BLK_TYPE_SRAM;
314 sdev->dsp_box.offset = MBOX_OFFSET;
320 ret = imx8_parse_clocks(sdev, priv->clks);
324 ret = imx8_enable_clocks(sdev, priv->clks);
341 static int imx8_remove(struct snd_sof_dev *sdev)
343 struct imx8_priv *priv = sdev->pdata->hw_pdata;
346 imx8_disable_clocks(sdev, priv->clks);
358 static int imx8_get_bar_index(struct snd_sof_dev *sdev, u32 type)
370 static void imx8_suspend(struct snd_sof_dev *sdev)
373 struct imx8_priv *priv = (struct imx8_priv *)sdev->pdata->hw_pdata;
378 imx8_disable_clocks(sdev, priv->clks);
381 static int imx8_resume(struct snd_sof_dev *sdev)
383 struct imx8_priv *priv = (struct imx8_priv *)sdev->pdata->hw_pdata;
387 ret = imx8_enable_clocks(sdev, priv->clks);
397 static int imx8_dsp_runtime_resume(struct snd_sof_dev *sdev)
404 ret = imx8_resume(sdev);
408 return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
411 static int imx8_dsp_runtime_suspend(struct snd_sof_dev *sdev)
417 imx8_suspend(sdev);
419 return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
422 static int imx8_dsp_suspend(struct snd_sof_dev *sdev, unsigned int target_state)
428 if (!pm_runtime_suspended(sdev->dev))
429 imx8_suspend(sdev);
431 return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
434 static int imx8_dsp_resume(struct snd_sof_dev *sdev)
441 ret = imx8_resume(sdev);
445 if (pm_runtime_suspended(sdev->dev)) {
446 pm_runtime_disable(sdev->dev);
447 pm_runtime_set_active(sdev->dev);
448 pm_runtime_mark_last_busy(sdev->dev);
449 pm_runtime_enable(sdev->dev);
450 pm_runtime_idle(sdev->dev);
453 return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);
481 static int imx8_dsp_set_power_state(struct snd_sof_dev *sdev,
484 sdev->dsp_power_state = *target_state;