Lines Matching defs:i2s
25 #define DRV_NAME "rockchip-i2s"
63 static int i2s_pinctrl_select_bclk_on(struct rk_i2s_dev *i2s)
67 if (!IS_ERR(i2s->pinctrl) && !IS_ERR_OR_NULL(i2s->bclk_on))
68 ret = pinctrl_select_state(i2s->pinctrl, i2s->bclk_on);
71 dev_err(i2s->dev, "bclk enable failed %d\n", ret);
76 static int i2s_pinctrl_select_bclk_off(struct rk_i2s_dev *i2s)
81 if (!IS_ERR(i2s->pinctrl) && !IS_ERR_OR_NULL(i2s->bclk_off))
82 ret = pinctrl_select_state(i2s->pinctrl, i2s->bclk_off);
85 dev_err(i2s->dev, "bclk disable failed %d\n", ret);
92 struct rk_i2s_dev *i2s = dev_get_drvdata(dev);
94 regcache_cache_only(i2s->regmap, true);
95 clk_disable_unprepare(i2s->mclk);
102 struct rk_i2s_dev *i2s = dev_get_drvdata(dev);
105 ret = clk_prepare_enable(i2s->mclk);
107 dev_err(i2s->dev, "clock enable failed %d\n", ret);
111 regcache_cache_only(i2s->regmap, false);
112 regcache_mark_dirty(i2s->regmap);
114 ret = regcache_sync(i2s->regmap);
116 clk_disable_unprepare(i2s->mclk);
126 static int rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on)
131 spin_lock(&i2s->lock);
133 ret = regmap_update_bits(i2s->regmap, I2S_DMACR,
138 ret = regmap_update_bits(i2s->regmap, I2S_XFER,
143 i2s->tx_start = true;
145 i2s->tx_start = false;
147 ret = regmap_update_bits(i2s->regmap, I2S_DMACR,
153 if (!i2s->rx_start) {
154 ret = regmap_update_bits(i2s->regmap, I2S_XFER,
160 ret = regmap_update_bits(i2s->regmap, I2S_CLR,
165 ret = regmap_read_poll_timeout_atomic(i2s->regmap,
172 dev_warn(i2s->dev, "fail to clear: %d\n", ret);
176 spin_unlock(&i2s->lock);
178 dev_err(i2s->dev, "lrclk update failed\n");
183 static int rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on)
188 spin_lock(&i2s->lock);
190 ret = regmap_update_bits(i2s->regmap, I2S_DMACR,
196 ret = regmap_update_bits(i2s->regmap, I2S_XFER,
201 i2s->rx_start = true;
203 i2s->rx_start = false;
205 ret = regmap_update_bits(i2s->regmap, I2S_DMACR,
211 if (!i2s->tx_start) {
212 ret = regmap_update_bits(i2s->regmap, I2S_XFER,
218 ret = regmap_update_bits(i2s->regmap, I2S_CLR,
223 ret = regmap_read_poll_timeout_atomic(i2s->regmap,
230 dev_warn(i2s->dev, "fail to clear: %d\n", ret);
234 spin_unlock(&i2s->lock);
236 dev_err(i2s->dev, "lrclk update failed\n");
244 struct rk_i2s_dev *i2s = to_info(cpu_dai);
254 i2s->is_master_mode = true;
258 i2s->is_master_mode = false;
265 regmap_update_bits(i2s->regmap, I2S_CKR, mask, val);
294 regmap_update_bits(i2s->regmap, I2S_CKR, mask, val);
318 regmap_update_bits(i2s->regmap, I2S_TXCR, mask, val);
342 regmap_update_bits(i2s->regmap, I2S_RXCR, mask, val);
354 struct rk_i2s_dev *i2s = to_info(dai);
359 if (i2s->is_master_mode) {
360 mclk_rate = clk_get_rate(i2s->mclk);
361 bclk_rate = i2s->bclk_ratio * params_rate(params);
367 regmap_update_bits(i2s->regmap, I2S_CKR,
371 regmap_update_bits(i2s->regmap, I2S_CKR,
412 dev_err(i2s->dev, "invalid channel: %d\n",
418 regmap_update_bits(i2s->regmap, I2S_RXCR,
422 regmap_update_bits(i2s->regmap, I2S_TXCR,
426 if (!IS_ERR(i2s->grf) && i2s->pins) {
427 regmap_read(i2s->regmap, I2S_TXCR, &val);
445 val <<= i2s->pins->shift;
446 val |= (I2S_IO_DIRECTION_MASK << i2s->pins->shift) << 16;
447 regmap_write(i2s->grf, i2s->pins->reg_offset, val);
450 regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_TDL_MASK,
452 regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK,
459 regmap_update_bits(i2s->regmap, I2S_CKR,
468 struct rk_i2s_dev *i2s = to_info(dai);
476 ret = rockchip_snd_rxctrl(i2s, 1);
478 ret = rockchip_snd_txctrl(i2s, 1);
481 i2s_pinctrl_select_bclk_on(i2s);
487 if (!i2s->tx_start)
488 i2s_pinctrl_select_bclk_off(i2s);
489 ret = rockchip_snd_rxctrl(i2s, 0);
491 if (!i2s->rx_start)
492 i2s_pinctrl_select_bclk_off(i2s);
493 ret = rockchip_snd_txctrl(i2s, 0);
507 struct rk_i2s_dev *i2s = to_info(dai);
509 i2s->bclk_ratio = ratio;
517 struct rk_i2s_dev *i2s = to_info(cpu_dai);
523 ret = clk_set_rate(i2s->mclk, freq);
525 dev_err(i2s->dev, "Fail to set mclk %d\n", ret);
532 struct rk_i2s_dev *i2s = snd_soc_dai_get_drvdata(dai);
535 i2s->has_playback ? &i2s->playback_dma_data : NULL,
536 i2s->has_capture ? &i2s->capture_dma_data : NULL);
649 { .compatible = "rockchip,px30-i2s", },
650 { .compatible = "rockchip,rk1808-i2s", },
651 { .compatible = "rockchip,rk3036-i2s", },
652 { .compatible = "rockchip,rk3066-i2s", },
653 { .compatible = "rockchip,rk3128-i2s", },
654 { .compatible = "rockchip,rk3188-i2s", },
655 { .compatible = "rockchip,rk3228-i2s", },
656 { .compatible = "rockchip,rk3288-i2s", },
657 { .compatible = "rockchip,rk3308-i2s", },
658 { .compatible = "rockchip,rk3328-i2s", },
659 { .compatible = "rockchip,rk3366-i2s", },
660 { .compatible = "rockchip,rk3368-i2s", },
661 { .compatible = "rockchip,rk3399-i2s", .data = &rk3399_i2s_pins },
662 { .compatible = "rockchip,rk3588-i2s", },
663 { .compatible = "rockchip,rv1126-i2s", },
667 static int rockchip_i2s_init_dai(struct rk_i2s_dev *i2s, struct resource *res,
670 struct device_node *node = i2s->dev->of_node;
678 i2s->has_playback = true;
680 i2s->has_capture = true;
683 dai = devm_kmemdup(i2s->dev, &rockchip_i2s_dai,
688 if (i2s->has_playback) {
699 i2s->playback_dma_data.addr = res->start + I2S_TXDR;
700 i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
701 i2s->playback_dma_data.maxburst = 8;
709 if (i2s->has_capture) {
720 i2s->capture_dma_data.addr = res->start + I2S_RXDR;
721 i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
722 i2s->capture_dma_data.maxburst = 8;
740 struct rk_i2s_dev *i2s;
746 i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL);
747 if (!i2s)
750 spin_lock_init(&i2s->lock);
751 i2s->dev = &pdev->dev;
753 i2s->grf = syscon_regmap_lookup_by_phandle(node, "rockchip,grf");
754 if (!IS_ERR(i2s->grf)) {
759 i2s->pins = of_id->data;
763 i2s->hclk = devm_clk_get(&pdev->dev, "i2s_hclk");
764 if (IS_ERR(i2s->hclk)) {
765 dev_err(&pdev->dev, "Can't retrieve i2s bus clock\n");
766 return PTR_ERR(i2s->hclk);
768 ret = clk_prepare_enable(i2s->hclk);
770 dev_err(i2s->dev, "hclock enable failed %d\n", ret);
774 i2s->mclk = devm_clk_get(&pdev->dev, "i2s_clk");
775 if (IS_ERR(i2s->mclk)) {
776 dev_err(&pdev->dev, "Can't retrieve i2s master clock\n");
777 ret = PTR_ERR(i2s->mclk);
787 i2s->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
789 if (IS_ERR(i2s->regmap)) {
792 ret = PTR_ERR(i2s->regmap);
796 i2s->bclk_ratio = 64;
797 i2s->pinctrl = devm_pinctrl_get(&pdev->dev);
798 if (!IS_ERR(i2s->pinctrl)) {
799 i2s->bclk_on = pinctrl_lookup_state(i2s->pinctrl, "bclk_on");
800 if (!IS_ERR_OR_NULL(i2s->bclk_on)) {
801 i2s->bclk_off = pinctrl_lookup_state(i2s->pinctrl, "bclk_off");
802 if (IS_ERR_OR_NULL(i2s->bclk_off)) {
803 dev_err(&pdev->dev, "failed to find i2s bclk_off\n");
809 dev_dbg(&pdev->dev, "failed to find i2s pinctrl\n");
812 i2s_pinctrl_select_bclk_off(i2s);
814 dev_set_drvdata(&pdev->dev, i2s);
823 ret = rockchip_i2s_init_dai(i2s, res, &dai);
850 clk_disable_unprepare(i2s->hclk);
856 struct rk_i2s_dev *i2s = dev_get_drvdata(&pdev->dev);
862 clk_disable_unprepare(i2s->hclk);